From patchwork Sun Sep 3 22:40:53 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Stefan_Br=C3=BCns?= X-Patchwork-Id: 9936615 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 39F8C601EB for ; Sun, 3 Sep 2017 22:42:32 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2BC79285E8 for ; Sun, 3 Sep 2017 22:42:32 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 206F7286AD; Sun, 3 Sep 2017 22:42:32 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 95292285E8 for ; Sun, 3 Sep 2017 22:42:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=F8l+FQEMT8pKzbGHEdkeFrfsWgTmNIYoSEEJRV9HS1M=; b=Kp0mN7QN+x0f9A oDmK32P0gzXwqaC2K6sbvsLcaZDKeAeRy+nFerjh1/8A+xeBs1b1u4iK5LEDvSjFXGWp3Q14eEl+M 51J0Bqa6uMHx5lV+JM/21u8cHfIGVX+orLb3Tc51JeY35u0bG7TDm6ANuW5T/3JzFkn55qeIChFkc h5KyK+2iydXSeg4/ksrKaU67GaPrWLZAeKCPdClHS2uVFiH39LijdvLp7jmHjQa8GXCw3gwxKmVSw YpckzdOMEkB/FLdf4Ksm4FW3bGsM5k5h/51GJKEnwBtDZl9l4AIVjoDitIT9l5r6RgoEZ8h2uTJtQ gf4pQOctuFvDVSJNy5Xw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dodau-0007dv-43; Sun, 03 Sep 2017 22:42:20 +0000 Received: from mail-out-2.itc.rwth-aachen.de ([134.130.5.47]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1dodaF-0006wF-Jf for linux-arm-kernel@lists.infradead.org; Sun, 03 Sep 2017 22:41:44 +0000 X-IronPort-AV: E=Sophos;i="5.41,472,1498514400"; d="scan'208";a="11607786" Received: from rwthex-w2-b.rwth-ad.de ([134.130.26.159]) by mail-in-2.itc.rwth-aachen.de with ESMTP; 04 Sep 2017 00:41:09 +0200 Received: from pebbles.fritz.box (92.225.242.208) by rwthex-w2-b.rwth-ad.de (2002:8682:1a9f::8682:1a9f) with Microsoft SMTP Server (TLS) id 15.0.1320.4; Mon, 4 Sep 2017 00:41:07 +0200 From: =?UTF-8?q?Stefan=20Br=C3=BCns?= To: Subject: [PATCH 02/10] dmaengine: sun6i: Correct burst length field offsets for H3 Date: Mon, 4 Sep 2017 00:40:53 +0200 Message-ID: <20170903224100.17893-3-stefan.bruens@rwth-aachen.de> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20170903224100.17893-1-stefan.bruens@rwth-aachen.de> References: <20170903224100.17893-1-stefan.bruens@rwth-aachen.de> MIME-Version: 1.0 X-Originating-IP: [92.225.242.208] X-ClientProxiedBy: rwthex-w1-b.rwth-ad.de (2002:8682:1a9d::8682:1a9d) To rwthex-w2-b.rwth-ad.de (2002:8682:1a9f::8682:1a9f) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170903_154140_062155_08A36579 X-CRM114-Status: UNSURE ( 8.85 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Vinod Koul , Andre Przywara , linux-kernel@vger.kernel.org, Code Kipper , Chen-Yu Tsai , Rob Herring , dmaengine@vger.kernel.org, Maxime Ripard , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP For the H3, the burst lengths field offsets in the channel configuration register differs from earlier SoC generations. Using the A31 register macros actually configured the H3 controller do to bursts of length 1 always, which although working leads to higher bus utilisation. Signed-off-by: Stefan Brüns --- drivers/dma/sun6i-dma.c | 28 +++++++++++++++++++++------- 1 file changed, 21 insertions(+), 7 deletions(-) diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c index 1d9b3be30d22..f1a139f0102f 100644 --- a/drivers/dma/sun6i-dma.c +++ b/drivers/dma/sun6i-dma.c @@ -68,13 +68,15 @@ #define DMA_CHAN_CFG_SRC_DRQ(x) ((x) & 0x1f) #define DMA_CHAN_CFG_SRC_IO_MODE BIT(5) #define DMA_CHAN_CFG_SRC_LINEAR_MODE (0 << 5) -#define DMA_CHAN_CFG_SRC_BURST(x) (((x) & 0x3) << 7) +#define DMA_CHAN_CFG_SRC_BURST_A31(x) (((x) & 0x3) << 7) +#define DMA_CHAN_CFG_SRC_BURST_H3(x) (((x) & 0x3) << 6) #define DMA_CHAN_CFG_SRC_WIDTH(x) (((x) & 0x3) << 9) #define DMA_CHAN_CFG_DST_DRQ(x) (DMA_CHAN_CFG_SRC_DRQ(x) << 16) #define DMA_CHAN_CFG_DST_IO_MODE (DMA_CHAN_CFG_SRC_IO_MODE << 16) #define DMA_CHAN_CFG_DST_LINEAR_MODE (DMA_CHAN_CFG_SRC_LINEAR_MODE << 16) -#define DMA_CHAN_CFG_DST_BURST(x) (DMA_CHAN_CFG_SRC_BURST(x) << 16) +#define DMA_CHAN_CFG_DST_BURST_A31(x) (DMA_CHAN_CFG_SRC_BURST_A31(x) << 16) +#define DMA_CHAN_CFG_DST_BURST_H3(x) (DMA_CHAN_CFG_SRC_BURST_H3(x) << 16) #define DMA_CHAN_CFG_DST_WIDTH(x) (DMA_CHAN_CFG_SRC_WIDTH(x) << 16) #define DMA_CHAN_CUR_SRC 0x10 @@ -554,11 +556,17 @@ static int set_config(struct sun6i_dma_dev *sdev, if (dst_width < 0) return dst_width; - *p_cfg = DMA_CHAN_CFG_SRC_BURST(src_burst) | - DMA_CHAN_CFG_SRC_WIDTH(src_width) | - DMA_CHAN_CFG_DST_BURST(dst_burst) | + *p_cfg = DMA_CHAN_CFG_SRC_WIDTH(src_width) | DMA_CHAN_CFG_DST_WIDTH(dst_width); + if (sdev->cfg->dmac_variant == DMAC_VARIANT_H3) { + *p_cfg |= DMA_CHAN_CFG_SRC_BURST_H3(src_burst) | + DMA_CHAN_CFG_DST_BURST_H3(dst_burst); + } else { + *p_cfg |= DMA_CHAN_CFG_SRC_BURST_A31(src_burst) | + DMA_CHAN_CFG_DST_BURST_A31(dst_burst); + } + return 0; } @@ -601,11 +609,17 @@ static struct dma_async_tx_descriptor *sun6i_dma_prep_dma_memcpy( DMA_CHAN_CFG_DST_DRQ(DRQ_SDRAM) | DMA_CHAN_CFG_DST_LINEAR_MODE | DMA_CHAN_CFG_SRC_LINEAR_MODE | - DMA_CHAN_CFG_SRC_BURST(burst) | DMA_CHAN_CFG_SRC_WIDTH(width) | - DMA_CHAN_CFG_DST_BURST(burst) | DMA_CHAN_CFG_DST_WIDTH(width); + if (sdev->cfg->dmac_variant == DMAC_VARIANT_H3) { + v_lli->cfg |= DMA_CHAN_CFG_SRC_BURST_H3(burst) | + DMA_CHAN_CFG_DST_BURST_H3(burst); + } else { + v_lli->cfg |= DMA_CHAN_CFG_SRC_BURST_A31(burst) | + DMA_CHAN_CFG_DST_BURST_A31(burst); + } + sun6i_dma_lli_add(NULL, v_lli, p_lli, txd); sun6i_dma_dump_lli(vchan, v_lli);