From patchwork Wed Sep 20 20:01:21 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Jernej_=C5=A0krabec?= X-Patchwork-Id: 9962295 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 1D46460208 for ; Wed, 20 Sep 2017 20:04:27 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 107B528894 for ; Wed, 20 Sep 2017 20:04:27 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 054D2289AB; Wed, 20 Sep 2017 20:04:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 6510728894 for ; Wed, 20 Sep 2017 20:04:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=HOH7Znr4ygn5rkqUiLnYVbj9+GIMs2dyMgh1WidyGNI=; b=bZWEuZRicR1ZA/9xCQgAIyZ9/G soqPOazzULiL+nDGO10/FSzui3ylOHuUnDMdNd8rcxoWYIi8JBk5xibMnw5RjjLjdBLR02bAS4KIY nYNWjL+glLrJ8+3f4KEvceXpLZc84cfg0Lr+iOqjigK1OWPU9dbkvdKGUKQl93OiXSGgchiAt9tQA XG35ZWHzc9jnz8OZgZ2rWS9STtJCyM0yaxMhFCLkHa8yZNsJ4w8LldydKVOhnbDiXv0RaExHaO9y4 39P7W5K+hposJ2IRuY4W36bPrV9ff2tWtim1EAwIzmHN5K3QU1Jiufzu9uvBfwvvw7G4kt5xd5igi ow7T8WjQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dulEK-0002JF-Ur; Wed, 20 Sep 2017 20:04:20 +0000 Received: from mailoutvs7.siol.net ([213.250.19.138] helo=mail.siol.net) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1dulC6-0000WI-OQ for linux-arm-kernel@lists.infradead.org; Wed, 20 Sep 2017 20:02:05 +0000 Received: from localhost (localhost [127.0.0.1]) by mail.siol.net (Postfix) with ESMTP id 677E5527D72; Wed, 20 Sep 2017 22:01:44 +0200 (CEST) X-Virus-Scanned: amavisd-new at psrvmta09.zcs-production.pri Received: from mail.siol.net ([127.0.0.1]) by localhost (psrvmta09.zcs-production.pri [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id IWL0tz2tnA3y; Wed, 20 Sep 2017 22:01:43 +0200 (CEST) Received: from mail.siol.net (localhost [127.0.0.1]) by mail.siol.net (Postfix) with ESMTPS id AFC79527D6F; Wed, 20 Sep 2017 22:01:43 +0200 (CEST) Received: from localhost.localdomain (cpe-86-58-68-135.ftth.triera.net [86.58.68.135]) (Authenticated sender: 031275009) by mail.siol.net (Postfix) with ESMTPSA id 518FE527D70; Wed, 20 Sep 2017 22:01:41 +0200 (CEST) From: Jernej Skrabec To: maxime.ripard@free-electrons.com, wens@csie.org Subject: [RESEND RFC PATCH 4/7] dt-bindings: Document Allwinner DWC HDMI TX node Date: Wed, 20 Sep 2017 22:01:21 +0200 Message-Id: <20170920200124.20457-5-jernej.skrabec@siol.net> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20170920200124.20457-1-jernej.skrabec@siol.net> References: <20170920200124.20457-1-jernej.skrabec@siol.net> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170920_130203_175916_BB249321 X-CRM114-Status: UNSURE ( 9.99 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, narmstrong@baylibre.com, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-sunxi@googlegroups.com, hans.verkuil@cisco.com, Laurent.pinchart@ideasonboard.com, linux-media@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, icenowy@aosc.io MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add documentation about Allwinner DWC HDMI TX node, found in H3 SoC. Signed-off-by: Jernej Skrabec Acked-by: Rob Herring --- .../bindings/display/sunxi/sun4i-drm.txt | 158 ++++++++++++++++++++- 1 file changed, 157 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt index 92512953943e..cb6aee5c486f 100644 --- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt +++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt @@ -60,6 +60,40 @@ Required properties: first port should be the input endpoint. The second should be the output, usually to an HDMI connector. +DWC HDMI TX Encoder +----------------------------- + +The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP +with Allwinner's own PHY IP. It supports audio and video outputs and CEC. + +These DT bindings follow the Synopsys DWC HDMI TX bindings defined in +Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt with the +following device-specific properties. + +Required properties: + + - compatible: value must be one of: + * "allwinner,sun8i-h3-dw-hdmi" + - reg: two pairs of base address and size of memory-mapped region, first + for controller and second for PHY + registers. + - reg-io-width: See dw_hdmi.txt. Shall be 1. + - interrupts: HDMI interrupt number + - clocks: phandles to the clocks feeding the HDMI encoder + * iahb: the HDMI interface clock + * isfr: the HDMI module clock + * ddc: the HDMI ddc clock + - clock-names: the clock names mentioned above + - resets: phandles to the reset controllers driving the encoder + * hdmi: the reset line for the HDMI + * ddc: the reset line for the DDC + - reset-names: the reset names mentioned above + + - ports: A ports node with endpoint definitions as defined in + Documentation/devicetree/bindings/media/video-interfaces.txt. The + first port should be the input endpoint. The second should be the + output, usually to an HDMI connector. + TV Encoder ---------- @@ -255,7 +289,7 @@ Required properties: - allwinner,pipelines: list of phandle to the display engine frontends (DE 1.0) or mixers (DE 2.0) available. -Example: +Example 1: panel: panel { compatible = "olimex,lcd-olinuxino-43-ts"; @@ -455,3 +489,125 @@ display-engine { compatible = "allwinner,sun5i-a13-display-engine"; allwinner,pipelines = <&fe0>; }; + +Example 2: + +connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; +}; + +de: display-engine { + compatible = "allwinner,sun8i-h3-display-engine"; + allwinner,pipelines = <&mixer0>; +}; + +hdmi: hdmi@1ee0000 { + compatible = "allwinner,h3-dw-hdmi"; + reg = <0x01ee0000 0x10000>, + <0x01ef0000 0x10000>; + reg-io-width = <1>; + interrupts = ; + clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI>, + <&ccu CLK_HDMI_DDC>; + clock-names = "iahb", "isfr", "ddc"; + resets = <&ccu RST_BUS_HDMI0>, <&ccu RST_BUS_HDMI1>; + reset-names = "hdmi", "ddc"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + hdmi_in: port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + hdmi_in_tcon0: endpoint@0 { + reg = <0>; + remote-endpoint = <&tcon0_out_hdmi>; + }; + }; + + hdmi_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; + }; + }; +}; + +mixer0: mixer@1100000 { + compatible = "allwinner,sun8i-h3-de2-mixer0"; + reg = <0x01100000 0x100000>; + clocks = <&display_clocks CLK_BUS_MIXER0>, + <&display_clocks CLK_MIXER0>; + clock-names = "bus", + "mod"; + resets = <&display_clocks RST_MIXER0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + mixer0_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + mixer0_out_tcon0: endpoint@0 { + reg = <0>; + remote-endpoint = <&tcon0_in_mixer0>; + }; + }; + }; +}; + +tcon0: lcd-controller@1c0c000 { + compatible = "allwinner,sun8i-h3-tcon"; + reg = <0x01c0c000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_TCON0>, + <&ccu CLK_TCON0>; + clock-names = "ahb", + "tcon-ch1"; + resets = <&ccu RST_BUS_TCON0>; + reset-names = "lcd"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + tcon0_in: port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + tcon0_in_mixer0: endpoint@0 { + reg = <0>; + remote-endpoint = <&mixer0_out_tcon0>; + }; + }; + + tcon0_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + tcon0_out_hdmi: endpoint@1 { + reg = <1>; + remote-endpoint = <&hdmi_in_tcon0>; + }; + }; + }; +};