From patchwork Sat Oct 14 12:29:25 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Icenowy Zheng X-Patchwork-Id: 10006393 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 6A970601E9 for ; Sat, 14 Oct 2017 12:32:01 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4AC2F291DB for ; Sat, 14 Oct 2017 12:32:01 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3F5C8291E8; Sat, 14 Oct 2017 12:32:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id CC3CA291DB for ; Sat, 14 Oct 2017 12:32:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=6VJlMzkoPubT0mKRAg970KQLsbZCitz2k4UFIrfXGe8=; b=Mpvf8Twau68WewsUpRJSUraI6e GC/5C6LMwxVqmeUyawNG9V7XDrwPRj0k8F6/L+S1BtaGbf0TZNrtzbC41xleqCbekMx25oFsT5iWP 3u/59fZK3reBdQSKvUwM2jpOpn0tEEWqmX5+fcSFBXW8CVLbA+poDfTrejZFGQvdIxJ5sRqtdIPv4 7k03lvhxVXPk/C41EXYvDVrBiexWNCBVJTKCjmrXl5Sp845B/A1rIvVBn6Rr6iwwlu1iX/83Bwp55 sNp6EWTQiY28rjWnfSi+HLJMonELp7pR5g8zDswhAmnY623Fzk9/4HurOc/f51RMp2HZLT2AvGsb5 xiMD+74Q==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1e3LbO-0003lW-O9; Sat, 14 Oct 2017 12:31:38 +0000 Received: from nov-007-i608.relay.mailchannels.net ([46.232.183.162]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1e3LaX-0003HJ-BP for linux-arm-kernel@lists.infradead.org; Sat, 14 Oct 2017 12:30:48 +0000 X-Sender-Id: lmn-tzduiowcrqmw|x-authsender|icenowy@aosc.io Received: from relay.mailchannels.net (localhost [127.0.0.1]) by relay.mailchannels.net (Postfix) with ESMTP id C2FF98A8F0E; Sat, 14 Oct 2017 12:30:14 +0000 (UTC) Received: from hermes.aosc.io (unknown [100.96.140.232]) (Authenticated sender: lmn-TZDUIOWCRQMW) by relay.mailchannels.net (Postfix) with ESMTPA id A883A8A8FFB; Sat, 14 Oct 2017 12:30:13 +0000 (UTC) X-Sender-Id: lmn-tzduiowcrqmw|x-authsender|icenowy@aosc.io Received: from hermes.aosc.io (hermes.aosc.io [172.20.63.14]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384) by 0.0.0.0:2500 (trex/5.9.14); Sat, 14 Oct 2017 12:30:14 +0000 X-MC-Relay: Neutral X-MailChannels-SenderId: lmn-tzduiowcrqmw|x-authsender|icenowy@aosc.io X-MailChannels-Auth-Id: lmn-TZDUIOWCRQMW X-Oafish-Wiry: 340f225317cedade_1507984214310_429818510 X-MC-Loop-Signature: 1507984214310:3079513043 X-MC-Ingress-Time: 1507984214309 Received: from localhost (localhost [127.0.0.1]) (Authenticated sender: icenowy@aosc.io) by hermes.aosc.io (Postfix) with ESMTPSA id 3242B4A4A0; Sat, 14 Oct 2017 12:30:07 +0000 (UTC) From: Icenowy Zheng To: Rob Herring , Maxime Ripard , Chen-Yu Tsai Subject: [PATCH 2/2] clk: sunxi-ng: add support for Allwinner A64 DE2 CCU Date: Sat, 14 Oct 2017 20:29:25 +0800 Message-Id: <20171014122925.13220-2-icenowy@aosc.io> In-Reply-To: <20171014122925.13220-1-icenowy@aosc.io> References: <20171014122925.13220-1-icenowy@aosc.io> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20171014_053046_121701_2EE23BBE X-CRM114-Status: GOOD ( 12.23 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Icenowy Zheng MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Allwinner A64's DE2 needs to claim a section of SRAM (SRAM C) to work. Add support for it. Signed-off-by: Icenowy Zheng --- drivers/clk/sunxi-ng/ccu-sun8i-de2.c | 32 ++++++++++++++++++++++++-------- 1 file changed, 24 insertions(+), 8 deletions(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c index 5cdaf52669e4..2e3a3ca087f7 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c @@ -17,6 +17,7 @@ #include #include #include +#include #include "ccu_common.h" #include "ccu_div.h" @@ -148,6 +149,11 @@ static const struct sunxi_ccu_desc sun8i_v3s_de2_clk_desc = { .num_resets = ARRAY_SIZE(sun8i_a83t_de2_resets), }; +static bool sunxi_de2_clk_has_sram(const struct device_node *node) +{ + return of_device_is_compatible(node, "allwinner,sun50i-a64-de2-clk"); +} + static int sunxi_de2_clk_probe(struct platform_device *pdev) { struct resource *res; @@ -191,11 +197,20 @@ static int sunxi_de2_clk_probe(struct platform_device *pdev) return ret; } + if (sunxi_de2_clk_has_sram(pdev->dev.of_node)) { + ret = sunxi_sram_claim(&pdev->dev); + if (ret) { + dev_err(&pdev->dev, + "Error couldn't map SRAM to device\n"); + return ret; + } + } + /* The clocks need to be enabled for us to access the registers */ ret = clk_prepare_enable(bus_clk); if (ret) { dev_err(&pdev->dev, "Couldn't enable bus clk: %d\n", ret); - return ret; + goto err_release_sram; } ret = clk_prepare_enable(mod_clk); @@ -224,6 +239,10 @@ static int sunxi_de2_clk_probe(struct platform_device *pdev) clk_disable_unprepare(mod_clk); err_disable_bus_clk: clk_disable_unprepare(bus_clk); +err_release_sram: + if (sunxi_de2_clk_has_sram(pdev->dev.of_node)) + sunxi_sram_release(&pdev->dev); + return ret; } @@ -237,16 +256,13 @@ static const struct of_device_id sunxi_de2_clk_ids[] = { .data = &sun8i_v3s_de2_clk_desc, }, { + .compatible = "allwinner,sun50i-a64-de2-clk", + .data = &sun50i_a64_de2_clk_desc, + }, + { .compatible = "allwinner,sun50i-h5-de2-clk", .data = &sun50i_a64_de2_clk_desc, }, - /* - * The Allwinner A64 SoC needs some bit to be poke in syscon to make - * DE2 really working. - * So there's currently no A64 compatible here. - * H5 shares the same reset line with A64, so here H5 is using the - * clock description of A64. - */ { } };