| Message ID | 20171018083138.14517-7-wens@csie.org (mailing list archive) |
|---|---|
| State | Mainlined, archived |
| Headers | show |
Hi,
Chen-Yu Tsai:
> mmc1 only has 1 possible pinmux setting.
What if someone is using the MMC with bus width 1 and then using the
remaining 3 pins for something else?
Joonas
On Wed, Oct 18, 2017 at 11:00 PM, Joonas Kylmälä <joonas.kylmala@iki.fi> wrote: > Hi, > > Chen-Yu Tsai: >> mmc1 only has 1 possible pinmux setting. > > What if someone is using the MMC with bus width 1 and then using the > remaining 3 pins for something else? I would very much like to see such a design. Currently the devices we see all follow Allwinner's reference design, with only minor modifications. As such, mmc1 is used exclusively for connecting SDIO-based WiFi modules. If such a radical(?) design is done, the vendor can always add a "mmc1-1bit-pins" setting and override the default. ChenYu
在 2017-10-19 14:48，Chen-Yu Tsai 写道： > On Wed, Oct 18, 2017 at 11:00 PM, Joonas Kylmälä > <joonas.kylmala@iki.fi> wrote: >> Hi, >> >> Chen-Yu Tsai: >>> mmc1 only has 1 possible pinmux setting. >> >> What if someone is using the MMC with bus width 1 and then using the >> remaining 3 pins for something else? > > I would very much like to see such a design. Currently the devices > we see all follow Allwinner's reference design, with only minor > modifications. As such, mmc1 is used exclusively for connecting > SDIO-based WiFi modules. > > If such a radical(?) design is done, the vendor can always add > a "mmc1-1bit-pins" setting and override the default. I think this kind of thing happened on A13 -- the MMC2 of A13 is 8-bit, but Lichee Pi One wires it to a SD card slot (4-bit); then the remaining 4 data lines are wired out as GPIO. (Lichee Pi's do not like obeying reference design ;-) ) But I think a MMC/SDIO device under 1-bit mode is too slow that maybe no one will use such a setup. > > ChenYu
On Thu, Oct 19, 2017 at 4:18 PM, <icenowy@aosc.io> wrote: > 在 2017-10-19 14:48，Chen-Yu Tsai 写道： >> >> On Wed, Oct 18, 2017 at 11:00 PM, Joonas Kylmälä <joonas.kylmala@iki.fi> >> wrote: >>> >>> Hi, >>> >>> Chen-Yu Tsai: >>>> >>>> mmc1 only has 1 possible pinmux setting. >>> >>> >>> What if someone is using the MMC with bus width 1 and then using the >>> remaining 3 pins for something else? >> >> >> I would very much like to see such a design. Currently the devices >> we see all follow Allwinner's reference design, with only minor >> modifications. As such, mmc1 is used exclusively for connecting >> SDIO-based WiFi modules. >> >> If such a radical(?) design is done, the vendor can always add >> a "mmc1-1bit-pins" setting and override the default. > > > I think this kind of thing happened on A13 -- the MMC2 of A13 is > 8-bit, but Lichee Pi One wires it to a SD card slot (4-bit); then > the remaining 4 data lines are wired out as GPIO. (Lichee Pi's > do not like obeying reference design ;-) ) For MMC2 we have mmc2_pins (4-bit) and mmc2_8bit_emmc_pins (8-bit + emmc reset pin). ChenYu > > But I think a MMC/SDIO device under 1-bit mode is too slow that > maybe no one will use such a setup. > >> >> ChenYu > > > -- > You received this message because you are subscribed to the Google Groups > "linux-sunxi" group. > To unsubscribe from this group and stop receiving emails from it, send an > email to linux-sunxi+unsubscribe@googlegroups.com. > For more options, visit https://groups.google.com/d/optout.
Chen-Yu Tsai: >> Chen-Yu Tsai: >>> mmc1 only has 1 possible pinmux setting. >> >> What if someone is using the MMC with bus width 1 and then using the >> remaining 3 pins for something else? > > I would very much like to see such a design. Currently the devices > we see all follow Allwinner's reference design, with only minor > modifications. As such, mmc1 is used exclusively for connecting > SDIO-based WiFi modules. > > If such a radical(?) design is done, the vendor can always add > a "mmc1-1bit-pins" setting and override the default. Alright. So could we then make similar patches for other SoCs that have the same situation with the MMC pinmuxing? I.e. let's move the pinctrl to the dtsi file from the dts files. With H3 SDC0 and SDC1 nodes could be moved then to the dtsi. Can't we also move the SDC0 pinctrl in A83T to the dtsi file? Though, in order to do that mmc0_cd_pin node needs to be added to the A38T dtsi. Joonas
On Fri, Oct 20, 2017 at 12:02 AM, Joonas Kylmälä <joonas.kylmala@iki.fi> wrote: > Chen-Yu Tsai: >>> Chen-Yu Tsai: >>>> mmc1 only has 1 possible pinmux setting. >>> >>> What if someone is using the MMC with bus width 1 and then using the >>> remaining 3 pins for something else? >> >> I would very much like to see such a design. Currently the devices >> we see all follow Allwinner's reference design, with only minor >> modifications. As such, mmc1 is used exclusively for connecting >> SDIO-based WiFi modules. >> >> If such a radical(?) design is done, the vendor can always add >> a "mmc1-1bit-pins" setting and override the default. > > Alright. So could we then make similar patches for other SoCs that have > the same situation with the MMC pinmuxing? I.e. let's move the pinctrl > to the dtsi file from the dts files. With H3 SDC0 and SDC1 nodes could > be moved then to the dtsi. Can't we also move the SDC0 pinctrl in A83T > to the dtsi file? Though, in order to do that mmc0_cd_pin node needs to > be added to the A38T dtsi. Yes. We are slowly doing this and other cleanups. This is somewhat boring and tedious, and it's not exactly a high priority item. You might have noticed Maxime recently sent patches to clean up sun4i and sun9i. ChenYu
diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts index 723641f56a74..de0be140338b 100644 --- a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts +++ b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts @@ -115,8 +115,6 @@ &mmc1 { mmc-pwrseq = <&wifi_pwrseq>; bus-width = <4>; - pinctrl-names = "default"; - pinctrl-0 = <&mmc1_pins>; vmmc-supply = <®_vcc3v3>; vqmmc-supply = <®_vcc3v3>; non-removable; diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index ce6e887c8938..19acae1b4089 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -212,6 +212,8 @@ resets = <&ccu RST_BUS_MMC1>; reset-names = "ahb"; interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins>; status = "disabled"; #address-cells = <1>; #size-cells = <0>;
mmc1 only has 1 possible pinmux setting. Move any settings to the dtsi file and set it by default. Signed-off-by: Chen-Yu Tsai <wens@csie.org> --- arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 2 -- arch/arm/boot/dts/sun8i-a83t.dtsi | 2 ++ 2 files changed, 2 insertions(+), 2 deletions(-)