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[v7,06/10] ARM: dts: sunxi: h3/h5: represent the mdio switch used by sun8i-h3-emac

Message ID 20171018114458.17891-7-clabbe.montjoie@gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

Corentin Labbe Oct. 18, 2017, 11:44 a.m. UTC
Since dwmac-sun8i could use either an integrated PHY or an external PHY
(which could be at same MDIO address), we need to represent this selection
by a MDIO switch.

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
---
 arch/arm/boot/dts/sunxi-h3-h5.dtsi | 33 +++++++++++++++++++++++++++------
 1 file changed, 27 insertions(+), 6 deletions(-)
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Patch

diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index d762098fc589..895816f4d741 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -422,14 +422,35 @@ 
 			#size-cells = <0>;
 			status = "disabled";
 
-			mdio: mdio {
+			mdio0: mdio {
 				#address-cells = <1>;
 				#size-cells = <0>;
-				int_mii_phy: ethernet-phy@1 {
-					compatible = "ethernet-phy-ieee802.3-c22";
-					reg = <1>;
-					clocks = <&ccu CLK_BUS_EPHY>;
-					resets = <&ccu RST_BUS_EPHY>;
+				compatible = "snps,dwmac-mdio";
+
+				mdio-mux {
+					compatible = "mdio-mux", "allwinner,sun8i-h3-mdio-mux";
+					#address-cells = <1>;
+					#size-cells = <0>;
+					/* Only one MDIO is usable at the time */
+					internal_mdio: mdio@1 {
+						compatible = "allwinner,sun8i-h3-mdio-internal";
+						reg = <1>;
+						#address-cells = <1>;
+						#size-cells = <0>;
+
+						int_mii_phy: ethernet-phy@1 {
+							compatible = "ethernet-phy-ieee802.3-c22";
+							reg = <1>;
+							clocks = <&ccu CLK_BUS_EPHY>;
+							resets = <&ccu RST_BUS_EPHY>;
+						};
+					};
+
+					external_mdio: mdio@2 {
+						reg = <2>;
+						#address-cells = <1>;
+						#size-cells = <0>;
+					};
 				};
 			};
 		};