From patchwork Tue Nov 7 05:37:28 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yixun Lan X-Patchwork-Id: 10045753 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 260BD60360 for ; Tue, 7 Nov 2017 05:39:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 145A029C4D for ; Tue, 7 Nov 2017 05:39:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0636929C91; Tue, 7 Nov 2017 05:39:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A63F929C4D for ; Tue, 7 Nov 2017 05:39:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=bSpvHmMQN5tgDarYJrnhNH1xQr9tfKRmZOgyVibbYzQ=; b=hetV/Mj6fwhcJ6 L5kuJ5UlHE2Ryage9ii+FvsulR3dEzob4HbgsBAZ8026ZnrhR9jupiQoXzrmw/R/p1lKcRw8s+HW7 ikuJwB45m9jx5Hq/CQiEhlSkLvZudKUZvfEV0nReFeFnGH6IPpR2cJfI+LMgtE13FfeEedVArDL2x IueaqM1QQbY97DTo9MC49JCg96TXNZjTIj10NZd0uRrYjJfurVf8MFoSMzGFNBGVK3ZVapZWg9kn4 +iZyjXjpJeYG0EWxqCfPNJKIi3lb7JI0d3WtzaQ4JsFLLhgetd6RWsRkaazTIBFfN8V/UgFxy+6cl OIkaW2XnetzB/PqZ9G+A==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1eBwbj-0001kk-NK; Tue, 07 Nov 2017 05:39:31 +0000 Received: from mail-sh2.amlogic.com ([58.32.228.45]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1eBwaK-0000Lj-UU; Tue, 07 Nov 2017 05:38:14 +0000 Received: from localhost.localdomain (10.18.20.76) by mail-sh2.amlogic.com (10.18.11.6) with Microsoft SMTP Server id 15.0.1320.4; Tue, 7 Nov 2017 13:37:09 +0800 From: Yixun Lan To: Kevin Hilman , , Martin Blumenstingl Subject: [PATCH v3 4/4] ARM64: dts: meson: drop "sana" clock from SARADC Date: Tue, 7 Nov 2017 13:37:28 +0800 Message-ID: <20171107053728.32169-2-yixun.lan@amlogic.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20171107053728.32169-1-yixun.lan@amlogic.com> References: <20171107053728.32169-1-yixun.lan@amlogic.com> MIME-Version: 1.0 X-Originating-IP: [10.18.20.76] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20171106_213805_741909_16E84566 X-CRM114-Status: UNSURE ( 6.07 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Yixun Lan , linux-kernel@vger.kernel.org, Rob Herring , linux-arm-kernel@lists.infradead.org, Carlo Caione , linux-amlogic@lists.infradead.org, Xingyu Chen Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Xingyu Chen The SAR ADC modules doesn't require The "sana" clock. Singed-off-by: Xingyu Chen Signed-off-by: Yixun Lan --- arch/arm/boot/dts/meson8.dtsi | 5 ++--- arch/arm/boot/dts/meson8b.dtsi | 5 ++--- arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 3 +-- arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 3 +-- 4 files changed, 6 insertions(+), 10 deletions(-) diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi index b98d44fde6b6..f93d6cf6e094 100644 --- a/arch/arm/boot/dts/meson8.dtsi +++ b/arch/arm/boot/dts/meson8.dtsi @@ -289,9 +289,8 @@ &saradc { compatible = "amlogic,meson8-saradc", "amlogic,meson-saradc"; clocks = <&clkc CLKID_XTAL>, - <&clkc CLKID_SAR_ADC>, - <&clkc CLKID_SANA>; - clock-names = "clkin", "core", "sana"; + <&clkc CLKID_SAR_ADC>; + clock-names = "clkin", "core"; }; &spifc { diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index bc278da7df0d..4aa444284f0c 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -185,9 +185,8 @@ &saradc { compatible = "amlogic,meson8b-saradc", "amlogic,meson-saradc"; clocks = <&clkc CLKID_XTAL>, - <&clkc CLKID_SAR_ADC>, - <&clkc CLKID_SANA>; - clock-names = "clkin", "core", "sana"; + <&clkc CLKID_SAR_ADC>; + clock-names = "clkin", "core"; }; &uart_AO { diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi index af834cdbba79..b77f2593cdc3 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi @@ -686,10 +686,9 @@ compatible = "amlogic,meson-gxbb-saradc", "amlogic,meson-saradc"; clocks = <&xtal>, <&clkc CLKID_SAR_ADC>, - <&clkc CLKID_SANA>, <&clkc CLKID_SAR_ADC_CLK>, <&clkc CLKID_SAR_ADC_SEL>; - clock-names = "clkin", "core", "sana", "adc_clk", "adc_sel"; + clock-names = "clkin", "core", "adc_clk", "adc_sel"; }; &sd_emmc_a { diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi index d8dd3298b15c..07805a3b4db0 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi @@ -628,10 +628,9 @@ compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc"; clocks = <&xtal>, <&clkc CLKID_SAR_ADC>, - <&clkc CLKID_SANA>, <&clkc CLKID_SAR_ADC_CLK>, <&clkc CLKID_SAR_ADC_SEL>; - clock-names = "clkin", "core", "sana", "adc_clk", "adc_sel"; + clock-names = "clkin", "core", "adc_clk", "adc_sel"; }; &sd_emmc_a {