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Wed, 08 Nov 2017 10:01:55 -0800 (PST) Received: from localhost.localdomain ([105.146.187.5]) by smtp.gmail.com with ESMTPSA id 10sm4819356wml.27.2017.11.08.10.01.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 08 Nov 2017 10:01:53 -0800 (PST) From: Ard Biesheuvel To: netdev@vger.kernel.org Subject: [RFC PATCH] phy: don't disable and re-enable interrupts in oneshot threaded handler Date: Wed, 8 Nov 2017 18:01:40 +0000 Message-Id: <20171108180140.3817-1-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20171108_100218_106240_B7675B2B X-CRM114-Status: GOOD ( 13.26 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: andrew@lunn.ch, f.fainelli@gmail.com, jason@lakedaemon.net, Ard Biesheuvel , marc.zyngier@arm.com, tglx@linutronix.de, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The PHY interrupt handling code registers its interrupt as a oneshot threaded interrupt, which guarantees that the interrupt will be masked throughout both the primary and secondary handling stages. However, the handling code still disables the interrupt by calling disable_irq(), and re-enables it by calling enable_irq() after having acked the interrupt in the PHY hardware. This causes problems with hierarchical irqchip implementations built on top of the GIC, because the core threaded interrupt code will only EOI the interrupt if it is still masked after the secondary handler completes. If this is not the case, the EOI is not emitted, and the interrupt remains active, blocking further interrupts from the same source. Disabling and enabling the interrupt will result in the secondary handler completing with the interrupt unmasked, resulting in the above behavior. So remove the disable_irq/enable_irq, and rely on the fact that the interrupt remains masked already. Signed-off-by: Ard Biesheuvel --- drivers/net/phy/phy.c | 20 ++++---------------- 1 file changed, 4 insertions(+), 16 deletions(-) diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index d0626bf5c540..ce8bba0c1072 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c @@ -774,8 +774,8 @@ static void phy_error(struct phy_device *phydev) * @irq: interrupt line * @phy_dat: phy_device pointer * - * Description: When a PHY interrupt occurs, the handler disables - * interrupts, and uses phy_change to handle the interrupt. + * Description: When a PHY interrupt occurs, the handler invokes + * phy_change to handle the interrupt. */ static irqreturn_t phy_interrupt(int irq, void *phy_dat) { @@ -784,9 +784,6 @@ static irqreturn_t phy_interrupt(int irq, void *phy_dat) if (PHY_HALTED == phydev->state) return IRQ_NONE; /* It can't be ours. */ - disable_irq_nosync(irq); - atomic_inc(&phydev->irq_disable); - phy_change(phydev); return IRQ_HANDLED; @@ -891,10 +888,10 @@ void phy_change(struct phy_device *phydev) if (phy_interrupt_is_valid(phydev)) { if (phydev->drv->did_interrupt && !phydev->drv->did_interrupt(phydev)) - goto ignore; + return; if (phy_disable_interrupts(phydev)) - goto phy_err; + goto irq_enable_err; } mutex_lock(&phydev->lock); @@ -903,9 +900,6 @@ void phy_change(struct phy_device *phydev) mutex_unlock(&phydev->lock); if (phy_interrupt_is_valid(phydev)) { - atomic_dec(&phydev->irq_disable); - enable_irq(phydev->irq); - /* Reenable interrupts */ if (PHY_HALTED != phydev->state && phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED)) @@ -916,15 +910,9 @@ void phy_change(struct phy_device *phydev) phy_trigger_machine(phydev, true); return; -ignore: - atomic_dec(&phydev->irq_disable); - enable_irq(phydev->irq); - return; - irq_enable_err: disable_irq(phydev->irq); atomic_inc(&phydev->irq_disable); -phy_err: phy_error(phydev); }