Message ID | 20171110200710.769271617@cogentembedded.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Fri, Nov 10, 2017 at 9:02 PM, Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> wrote: > Add the (previously omitted) SCIF0 pin data to the Eagle board's > device tree. > > Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
Index: renesas/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts =================================================================== --- renesas.orig/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts +++ renesas/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts @@ -52,11 +52,21 @@ clock-frequency = <32768>; }; +&pfc { + scif0_pins: scif0 { + groups = "scif0_data"; + function = "scif0"; + }; +}; + &rwdt { timeout-sec = <60>; status = "okay"; }; &scif0 { + pinctrl-0 = <&scif0_pins>; + pinctrl-names = "default"; + status = "okay"; };
Add the (previously omitted) SCIF0 pin data to the Eagle board's device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> --- arch/arm64/boot/dts/renesas/r8a77970-eagle.dts | 10 ++++++++++ 1 file changed, 10 insertions(+)