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[91.61.219.101]) by smtp.gmail.com with ESMTPSA id b16sm13411886wrd.69.2017.12.15.14.39.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 15 Dec 2017 14:39:04 -0800 (PST) From: Philipp Rossak To: robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, maxime.ripard@free-electrons.com, wens@csie.org Subject: [PATCH 2/2] ARM: dts: sun8i: h3: Enable dwmac-sun8i on the Nanopi M1 Date: Fri, 15 Dec 2017 23:39:01 +0100 Message-Id: <20171215223901.14500-3-embed3d@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171215223901.14500-1-embed3d@gmail.com> References: <20171215223901.14500-1-embed3d@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20171215_143939_189137_4C320256 X-CRM114-Status: UNSURE ( 9.29 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The dwmac-sun8i hardware is present on the Nanopi M1. It uses the internal PHY Signed-off-by: Philipp Rossak --- arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts index 3a2ccdb28afd..c77fbca4f227 100644 --- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts +++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts @@ -45,6 +45,10 @@ / { model = "FriendlyArm NanoPi M1"; compatible = "friendlyarm,nanopi-m1", "allwinner,sun8i-h3"; + + aliases { + ethernet0 = &emac; + }; }; &ehci1 { @@ -55,6 +59,13 @@ status = "okay"; }; +&emac { + phy-handle = <&int_mii_phy>; + phy-mode = "mii"; + allwinner,leds-active-low; + status = "okay"; +}; + &ir { pinctrl-names = "default"; pinctrl-0 = <&ir_pins_a>;