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[192.88.167.1]) by smtp.gmail.com with ESMTPSA id b9sm67284890pfl.108.2017.12.26.02.03.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 26 Dec 2017 02:03:59 -0800 (PST) Date: Tue, 26 Dec 2017 18:03:44 +0800 From: Dong Aisheng To: Peng Fan Subject: Re: [PATCH] arm: imx: suspend/resume: use outer_disable/resume Message-ID: <20171226100344.GA11724@b29396-OptiPlex-7040> References: <20171210120718.15197-1-peng.fan@nxp.com> <20171226091230.GP23070@X250> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.24 (2015-08-30) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20171226_020411_669466_88499AB6 X-CRM114-Status: GOOD ( 21.20 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "A.s. Dong" , "linux-kernel@vger.kernel.org" , Russell King , "van.freenix@gmail.com" , Sascha Hauer , Fabio Estevam , Shawn Guo , "linux-arm-kernel@lists.infradead.org" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP On Tue, Dec 26, 2017 at 09:49:01AM +0000, Peng Fan wrote: > Hi Shawn > > > -----Original Message----- > > From: Shawn Guo [mailto:shawnguo@kernel.org] > > Sent: Tuesday, December 26, 2017 5:13 PM > > To: Peng Fan > > Cc: A.s. Dong ; linux-kernel@vger.kernel.org; Russell > > King ; Fabio Estevam ; > > Sascha Hauer ; van.freenix@gmail.com; linux-arm- > > kernel@lists.infradead.org > > Subject: Re: [PATCH] arm: imx: suspend/resume: use outer_disable/resume > > > > On Sun, Dec 10, 2017 at 08:07:18PM +0800, Peng Fan wrote: > > > Use outer_disable/resume for suspend/resume. > > > With the two APIs used, code could be simplified and easy to extend to > > > introduce l2c_write_sec for i.MX platforms when moving Linux Kernel > > > runs in non-secure world. > > > > > > Signed-off-by: Peng Fan > > > Cc: Shawn Guo > > > Cc: Sascha Hauer > > > Cc: Fabio Estevam > > > Cc: Russell King > > > Cc: Dong Aisheng > > > > Changed 'arm: ' prefix to 'ARM: ', and applied patch. > > I just tested it on 6sx-sdb, seems this patch breaks 6sx. Could you first drop this > patch? I'll send out v2 fix the 6sx issue soon. > Yes, i tested mx6ul/mx6sl ok but mx6sx sdb failed. After a few debug, it seems you removed the l2c310_early_resume in v7_cpu_resume which is shared between lower power idle and suspend. Current only mx6sx/mx6ul supports low power idle in upstream, but mx6ul is A7 with internal L2, that's probably why only mx6sx showed the issue. I did the following quick try to restore L2 after exit lower power idle, but still can meet occasional crash during booting. As this changed the order to L2 restore and cpu resume, so i'm not quite sure if lower power idle still requres L2 restore before CPU resume or something else we're missing. Regards Dong Aisheng > Thanks, > Peng. > > > > > Shawn diff --git a/arch/arm/mach-imx/cpuidle-imx6sx.c b/arch/arm/mach-imx/cpuidle-imx6sx.c index c5a5c3a..edce5bd 100644 --- a/arch/arm/mach-imx/cpuidle-imx6sx.c +++ b/arch/arm/mach-imx/cpuidle-imx6sx.c @@ -26,7 +26,7 @@ static int imx6sx_idle_finish(unsigned long val) * to adding conditional code for L2 cache type, * just call flush_cache_all() is fine. */ - flush_cache_all(); +// flush_cache_all(); cpu_do_idle(); return 0; @@ -49,7 +49,9 @@ static int imx6sx_enter_wait(struct cpuidle_device *dev, cpu_pm_enter(); cpu_cluster_pm_enter(); + outer_disable(); cpu_suspend(0, imx6sx_idle_finish); + outer_resume(); cpu_cluster_pm_exit(); cpu_pm_exit();