From patchwork Tue Jan 2 16:42:19 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Agner X-Patchwork-Id: 10141005 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A80CD6035E for ; Tue, 2 Jan 2018 16:42:46 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9C04028C6B for ; Tue, 2 Jan 2018 16:42:46 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9096828C98; Tue, 2 Jan 2018 16:42:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 0F56928C90 for ; Tue, 2 Jan 2018 16:42:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=VX2OWHRYxjhjbAnCMF/peFTNq9qE31pWyAy2wt6Vp2c=; b=dVgMIO7BF40NGS+B7+TXlrPndf ai16d6p5jW+GCEW6+u+QmBJ2FQI3LShNH/XyxY1rTHDvcDHjJnCdEtwHxYSQAyFiC5kBhC5OT1DZm 0NPkZDt867tJpcwCzpJ2Lu1Htfhl6Iw3TS/j1jtluVBfYJPsKS4s0vE3djIXaScRHPbpJ1DUGyWvg Jlzqsdtkf/MpHsWUVvw+eO493H65Q/14OKO1bTuYGWtC7LWtJ3uvDIUGbYriloTbLd5qrtFDrFqze ylPjH8sbanRb+FlQPpb33oqYWEjq4gJTy87fMnoUdxfma+sXKtRMnkdTrQIWw+Lfo1RsG34k+85E4 N0GzS3og==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.89 #1 (Red Hat Linux)) id 1eWPeF-0006J6-DZ; Tue, 02 Jan 2018 16:42:43 +0000 Received: from mail.kmu-office.ch ([2a02:418:6a02::a2]) by bombadil.infradead.org with esmtps (Exim 4.89 #1 (Red Hat Linux)) id 1eWPeA-0006Gp-Mh for linux-arm-kernel@lists.infradead.org; Tue, 02 Jan 2018 16:42:40 +0000 Received: from trochilidae.toradex.int (unknown [IPv6:2001:1620:c6e::127]) by mail.kmu-office.ch (Postfix) with ESMTPSA id E0D045C3B3E; Tue, 2 Jan 2018 17:35:56 +0100 (CET) From: Stefan Agner To: shawnguo@kernel.org, kernel@pengutronix.de Subject: [PATCH 3/7] ARM: dts: imx6ull: add additional pinfunc defines for i.MX 6ULL Date: Tue, 2 Jan 2018 17:42:19 +0100 Message-Id: <20180102164223.15230-3-stefan@agner.ch> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180102164223.15230-1-stefan@agner.ch> References: <20180102164223.15230-1-stefan@agner.ch> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=agner.ch; s=dkim; t=1514910957; bh=mwstvlGozQBmxbluwMRQGMDbDE2+AxlVAtvdpLdM9DQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; b=OmhfpOEEz79ZNJ//ePv+HLiMLfSNu5jX2ZZhyPqN5+Zgkzing2Q5quu4TmKOJ9N2nBxzXn90DTcFS1qp0B04/J+v03d/QpLbyBJzVNal0qDL2Ua9SEdWYvk9mqD1gAnJku5i4s9mz3pTFfJyL2zdTmFnajpFwvg6l1qYjIUstQo= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180102_084238_977324_2A74CACD X-CRM114-Status: GOOD ( 11.89 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, Bai Ping , linux-kernel@vger.kernel.org, Stefan Agner , robh+dt@kernel.org, fabio.estevam@nxp.com, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Bai Ping On i.MX 6ULL, the pin MUX and CTRL register of BOOT_MODEx and TAMPERx pins are available through IOMUXC_SNVS. Add additional pinfunc defines. Signed-off-by: Bai Ping Signed-off-by: Stefan Agner Reviewed-by: Rob Herring Acked-by: Dong Aisheng --- arch/arm/boot/dts/imx6ull-pinfunc-snvs.h | 29 +++++++++++++++++++++++++++++ arch/arm/boot/dts/imx6ull.dtsi | 1 + 2 files changed, 30 insertions(+) create mode 100644 arch/arm/boot/dts/imx6ull-pinfunc-snvs.h diff --git a/arch/arm/boot/dts/imx6ull-pinfunc-snvs.h b/arch/arm/boot/dts/imx6ull-pinfunc-snvs.h new file mode 100644 index 000000000000..da3f412e4269 --- /dev/null +++ b/arch/arm/boot/dts/imx6ull-pinfunc-snvs.h @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __DTS_IMX6ULL_PINFUNC_SNVS_H +#define __DTS_IMX6ULL_PINFUNC_SNVS_H +/* + * The pin function ID is a tuple of + * + */ +#define MX6ULL_PAD_BOOT_MODE0__GPIO5_IO10 0x0000 0x0044 0x0000 0x5 0x0 +#define MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11 0x0004 0x0048 0x0000 0x5 0x0 +#define MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x0008 0x004C 0x0000 0x5 0x0 +#define MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x000C 0x0050 0x0000 0x5 0x0 +#define MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x0010 0x0054 0x0000 0x5 0x0 +#define MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x0014 0x0058 0x0000 0x5 0x0 +#define MX6ULL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x0018 0x005C 0x0000 0x5 0x0 +#define MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x001C 0x0060 0x0000 0x5 0x0 +#define MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x0020 0x0064 0x0000 0x5 0x0 +#define MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x0024 0x0068 0x0000 0x5 0x0 +#define MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x0028 0x006C 0x0000 0x5 0x0 +#define MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x002C 0x0070 0x0000 0x5 0x0 + +#endif /* __DTS_IMX6ULL_PINFUNC_SNVS_H */ + diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi index 0c182917b863..a58c01dc15c3 100644 --- a/arch/arm/boot/dts/imx6ull.dtsi +++ b/arch/arm/boot/dts/imx6ull.dtsi @@ -41,3 +41,4 @@ #include "imx6ul.dtsi" #include "imx6ull-pinfunc.h" +#include "imx6ull-pinfunc-snvs.h"