From patchwork Wed Jan 24 08:27:08 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steve Capper X-Patchwork-Id: 10181909 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 36651602B7 for ; Wed, 24 Jan 2018 08:27:37 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 219C92882A for ; Wed, 24 Jan 2018 08:27:37 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 14A872882F; Wed, 24 Jan 2018 08:27:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id EA3D42882A for ; Wed, 24 Jan 2018 08:27:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To: References:List-Owner; bh=M8y3JoFE7ZWL8R2tX1EXnCZqBFXxeInUwt02PAxLkmA=; b=EiK 85JvS9sty8BCwSXOxhZGulFf7H0+6oBhkPYzInf3U62+EuPqPcZVRyGVHl5Y0fu8HiMQVDFIjLhVV KZqgA+G6iNvG2Qj2vrNGu1t8Qo9p+oC11kIj08jopOuR2MwXqRiIlDZe830dCwbxEWMjlSYJOYrBC wH6+ewPba6VEERjP+6QTcLokpAYvZ8WKPkNK6kgyWurJTFWVWhOZXxkwsqk/l5sDzhPJQ+TA7waHW +b4Co8Hf7tVrvH/Gn0XN2t3zOy8jIRKWnD5XWog+/xv03mOgyJ9W1J7LRjZ5ATMxug8SwOl9WEIay ULWBlJjMv/yyyEVpR+u5xMRiwgf2iug==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.89 #1 (Red Hat Linux)) id 1eeGP7-0007aE-RQ; Wed, 24 Jan 2018 08:27:33 +0000 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70] helo=foss.arm.com) by bombadil.infradead.org with esmtp (Exim 4.89 #1 (Red Hat Linux)) id 1eeGP5-0007Zr-4W for linux-arm-kernel@lists.infradead.org; Wed, 24 Jan 2018 08:27:32 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4F3371435; Wed, 24 Jan 2018 00:27:18 -0800 (PST) Received: from capper-debian.shanghai.arm.com (unknown [10.171.18.36]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 043D33F487; Wed, 24 Jan 2018 00:27:16 -0800 (PST) From: Steve Capper To: linux-arm-kernel@lists.infradead.org Subject: [PATCH] arm64: Fix TTBR + PAN + 52-bit PA logic in cpu_do_switch_mm Date: Wed, 24 Jan 2018 08:27:08 +0000 Message-Id: <20180124082708.29038-1-steve.capper@arm.com> X-Mailer: git-send-email 2.11.0 X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: catalin.marinas@arm.com, Steve Capper , kristina.martsenko@arm.com, suzuki.poulose@arm.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP In cpu_do_switch_mm(.) with ARM64_SW_TTBR0_PAN=y we apply phys_to_ttbr to a value that already has an ASID inserted into the upper bits. For 52-bit PA configurations this then can give us TTBR0_EL1 registers that cause translation table walks to attempt to access non-zero PA[51:48] spuriously. Ultimately leading to a Synchronous External Abort on level 1 translation. This patch re-arranges the logic in cpu_do_switch_mm(.) such that phys_to_ttbr is called before the ASID is inserted into the TTBR0 value. Signed-off-by: Steve Capper Acked-by: Suzuki K Poulose Tested-by: Kristina Martsenko Reviewed-by: Kristina Martsenko --- This applies to the arm64 for-next/core branch. --- arch/arm64/mm/proc.S | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S index c6a12073ef46..9f177aac6390 100644 --- a/arch/arm64/mm/proc.S +++ b/arch/arm64/mm/proc.S @@ -153,14 +153,14 @@ ENDPROC(cpu_do_resume) ENTRY(cpu_do_switch_mm) mrs x2, ttbr1_el1 mmid x1, x1 // get mm->context.id + phys_to_ttbr x0, x3 #ifdef CONFIG_ARM64_SW_TTBR0_PAN - bfi x0, x1, #48, #16 // set the ASID field in TTBR0 + bfi x3, x1, #48, #16 // set the ASID field in TTBR0 #endif bfi x2, x1, #48, #16 // set the ASID msr ttbr1_el1, x2 // in TTBR1 (since TCR.A1 is set) isb - phys_to_ttbr x0, x2 - msr ttbr0_el1, x2 // now update TTBR0 + msr ttbr0_el1, x3 // now update TTBR0 isb b post_ttbr_update_workaround // Back to C code... ENDPROC(cpu_do_switch_mm)