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[87.143.4.210]) by smtp.gmail.com with ESMTPSA id l17sm6483422wrh.67.2018.02.13.04.30.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 13 Feb 2018 04:30:01 -0800 (PST) From: Philipp Rossak To: mchehab@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, maxime.ripard@free-electrons.com, wens@csie.org, linux@armlinux.org.uk, sean@mess.org, p.zabel@pengutronix.de, andi.shyti@samsung.com Subject: [RESEND PATCH v5 4/6] arm: dts: sun8i: a83t: Add support for the cir interface Date: Tue, 13 Feb 2018 13:29:50 +0100 Message-Id: <20180213122952.8420-5-embed3d@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180213122952.8420-1-embed3d@gmail.com> References: <20180213122952.8420-1-embed3d@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180213_043014_375939_7A897554 X-CRM114-Status: GOOD ( 10.45 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The cir interface is like on the H3 located at 0x01f02000 and is exactly the same. This patch adds support for the ir interface on the A83T. Signed-off-by: Philipp Rossak --- arch/arm/boot/dts/sun8i-a83t.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index f7f78a27e21d..1e04a5cfd32d 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -704,6 +704,19 @@ #reset-cells = <1>; }; + r_cir: ir@1f02000 { + compatible = "allwinner,sun8i-a83t-ir", + "allwinner,sun5i-a13-ir"; + clocks = <&r_ccu CLK_APB0_IR>, <&r_ccu CLK_IR>; + clock-names = "apb", "ir"; + resets = <&r_ccu RST_APB0_IR>; + interrupts = ; + reg = <0x01f02000 0x400>; + pinctrl-names = "default"; + pinctrl-0 = <&r_cir_pin>; + status = "disabled"; + }; + r_pio: pinctrl@1f02c00 { compatible = "allwinner,sun8i-a83t-r-pinctrl"; reg = <0x01f02c00 0x400>;