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Tue, 20 Feb 2018 18:01:49 +0100 (CET) Received: from seth.se.axis.com (unknown [10.0.2.172]) by boulder03.se.axis.com (Postfix) with ESMTP; Tue, 20 Feb 2018 18:01:49 +0100 (CET) Received: from lnxartpec1.se.axis.com (lnxartpec1.se.axis.com [10.88.4.10]) by seth.se.axis.com (Postfix) with ESMTP id 131841B5A; Tue, 20 Feb 2018 18:01:49 +0100 (CET) Received: by lnxartpec1.se.axis.com (Postfix, from userid 20283) id 0F0D5401B8; Tue, 20 Feb 2018 18:01:49 +0100 (CET) From: Niklas Cassel To: arm@kernel.org, Jesper Nilsson , Lars Persson , Niklas Cassel , Rob Herring , Mark Rutland , Russell King Subject: [PATCH 7/8] ARM: dts: artpec: add disabled node for PCIe endpoint mode Date: Tue, 20 Feb 2018 18:00:48 +0100 Message-Id: <20180220170049.22809-8-niklas.cassel@axis.com> X-Mailer: git-send-email 2.14.2 In-Reply-To: <20180220170049.22809-1-niklas.cassel@axis.com> References: <20180220170049.22809-1-niklas.cassel@axis.com> X-TM-AS-GCONF: 00 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180220_090202_648509_3D4C7B9E X-CRM114-Status: GOOD ( 12.89 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-kernel@axis.com, linux-kernel@vger.kernel.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The PCIe controller in the artpec6 SoC supports both root complex and endpoint mode, however, the controller can only be used in one of the modes. Both pci nodes are disabled by default. A DTS file can enable one of them, depending on what mode it wants to run. Signed-off-by: Niklas Cassel --- arch/arm/boot/dts/artpec6.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm/boot/dts/artpec6.dtsi b/arch/arm/boot/dts/artpec6.dtsi index 1c46df0c03ce..8d02d210574a 100644 --- a/arch/arm/boot/dts/artpec6.dtsi +++ b/arch/arm/boot/dts/artpec6.dtsi @@ -154,6 +154,10 @@ interrupt-affinity = <&cpu0>, <&cpu1>; }; + /* + * Both pci nodes cannot be enabled at the same time, + * leave the unwanted node as disabled. + */ pcie: pcie@f8050000 { compatible = "axis,artpec6-pcie", "snps,dw-pcie"; reg = <0xf8050000 0x2000 @@ -181,6 +185,22 @@ status = "disabled"; }; + pcie_ep: pcie_ep@f8050000 { + compatible = "axis,artpec6-pcie-ep", "snps,dw-pcie"; + reg = <0xf8050000 0x2000 + 0xf8051000 0x2000 + 0xf8040000 0x1000 + 0xc0000000 0x20000000>; + reg-names = "dbi", "dbi2", "phy", "addr_space"; + num-ib-windows = <6>; + num-ob-windows = <2>; + num-lanes = <2>; + interrupts = ; + interrupt-names = "msi"; + axis,syscon-pcie = <&syscon>; + status = "disabled"; + }; + pinctrl: pinctrl@f801d000 { compatible = "axis,artpec6-pinctrl"; reg = <0xf801d000 0x400>;