From patchwork Thu May 17 08:29:34 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Antoine Tenart X-Patchwork-Id: 10405907 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D4912602C2 for ; Thu, 17 May 2018 08:33:58 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C1E8A288B5 for ; Thu, 17 May 2018 08:33:58 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B4243289AB; Thu, 17 May 2018 08:33:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id CF158288B5 for ; Thu, 17 May 2018 08:33:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=IJzKWHH6slBJSv4+W/2huVvO9L5h9A52i2O1fs3qT9A=; b=mohLz4LAQr9oUpcPuJtNk4hBe+ K1SWyeetoSB0AcJIWyoOWxbTUrmGEJBFRtuugtiwQNEDRUTe2lit2leNVRBtcJOHdKYn/QOzjHfaH TaWewQuvG6TvdX7qvkH2c01K17sEQO0fvWeLixwMOcSqbC19fcS9bezZByePL/VAYWzDwOoSrS9cl abg4U8U3+EijklgrTmY3guuP0/tkopzOoSNdL7aC4bEmanCWfbu01QbAa3ctPp2Yjcpezq8qjlTV6 vT3IH0KM7aC/2XP7UWwPX/2D8lMWdySFJujz8wJM5ElH014J5Pa5lj6cTrNkwAb8H3YE4Cfxvijgb ED4CxGXA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1fJEM8-000182-0v; Thu, 17 May 2018 08:33:48 +0000 Received: from mail.bootlin.com ([62.4.15.54]) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1fJEJ6-0008H6-SD for linux-arm-kernel@lists.infradead.org; Thu, 17 May 2018 08:30:47 +0000 Received: by mail.bootlin.com (Postfix, from userid 110) id 205DA208E3; Thu, 17 May 2018 10:30:28 +0200 (CEST) Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.bootlin.com (Postfix) with ESMTPSA id 4BAA1208E4; Thu, 17 May 2018 10:30:03 +0200 (CEST) From: Antoine Tenart To: davem@davemloft.net, kishon@ti.com, linux@armlinux.org.uk, gregory.clement@bootlin.com, andrew@lunn.ch, jason@lakedaemon.net, sebastian.hesselbarth@gmail.com Subject: [PATCH net-next v3 05/10] net: mvpp2: 1000baseX support Date: Thu, 17 May 2018 10:29:34 +0200 Message-Id: <20180517082939.14598-6-antoine.tenart@bootlin.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180517082939.14598-1-antoine.tenart@bootlin.com> References: <20180517082939.14598-1-antoine.tenart@bootlin.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180517_013041_242740_A7B17FF7 X-CRM114-Status: GOOD ( 15.25 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ymarkman@marvell.com, Antoine Tenart , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, maxime.chevallier@bootlin.com, nadavh@marvell.com, thomas.petazzoni@bootlin.com, miquel.raynal@bootlin.com, stefanc@marvell.com, mw@semihalf.com, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds the 1000Base-X PHY mode support in the Marvell PPv2 driver. 1000Base-X is quite close the SGMII and uses nearly the same code path. Signed-off-by: Antoine Tenart --- drivers/net/ethernet/marvell/mvpp2.c | 72 ++++++++++++++++++++-------- 1 file changed, 51 insertions(+), 21 deletions(-) diff --git a/drivers/net/ethernet/marvell/mvpp2.c b/drivers/net/ethernet/marvell/mvpp2.c index 60093f1e6297..ece61f1727e4 100644 --- a/drivers/net/ethernet/marvell/mvpp2.c +++ b/drivers/net/ethernet/marvell/mvpp2.c @@ -4870,6 +4870,7 @@ static int mvpp22_gop_init(struct mvpp2_port *port) mvpp22_gop_init_rgmii(port); break; case PHY_INTERFACE_MODE_SGMII: + case PHY_INTERFACE_MODE_1000BASEX: mvpp22_gop_init_sgmii(port); break; case PHY_INTERFACE_MODE_10GKR: @@ -4907,7 +4908,8 @@ static void mvpp22_gop_unmask_irq(struct mvpp2_port *port) u32 val; if (phy_interface_mode_is_rgmii(port->phy_interface) || - port->phy_interface == PHY_INTERFACE_MODE_SGMII) { + port->phy_interface == PHY_INTERFACE_MODE_SGMII || + port->phy_interface == PHY_INTERFACE_MODE_1000BASEX) { /* Enable the GMAC link status irq for this port */ val = readl(port->base + MVPP22_GMAC_INT_SUM_MASK); val |= MVPP22_GMAC_INT_SUM_MASK_LINK_STAT; @@ -4937,7 +4939,8 @@ static void mvpp22_gop_mask_irq(struct mvpp2_port *port) } if (phy_interface_mode_is_rgmii(port->phy_interface) || - port->phy_interface == PHY_INTERFACE_MODE_SGMII) { + port->phy_interface == PHY_INTERFACE_MODE_SGMII || + port->phy_interface == PHY_INTERFACE_MODE_1000BASEX) { val = readl(port->base + MVPP22_GMAC_INT_SUM_MASK); val &= ~MVPP22_GMAC_INT_SUM_MASK_LINK_STAT; writel(val, port->base + MVPP22_GMAC_INT_SUM_MASK); @@ -4949,7 +4952,8 @@ static void mvpp22_gop_setup_irq(struct mvpp2_port *port) u32 val; if (phy_interface_mode_is_rgmii(port->phy_interface) || - port->phy_interface == PHY_INTERFACE_MODE_SGMII) { + port->phy_interface == PHY_INTERFACE_MODE_SGMII || + port->phy_interface == PHY_INTERFACE_MODE_1000BASEX) { val = readl(port->base + MVPP22_GMAC_INT_MASK); val |= MVPP22_GMAC_INT_MASK_LINK_STAT; writel(val, port->base + MVPP22_GMAC_INT_MASK); @@ -4974,6 +4978,7 @@ static int mvpp22_comphy_init(struct mvpp2_port *port) switch (port->phy_interface) { case PHY_INTERFACE_MODE_SGMII: + case PHY_INTERFACE_MODE_1000BASEX: mode = PHY_MODE_SGMII; break; case PHY_INTERFACE_MODE_10GKR: @@ -5056,7 +5061,8 @@ static void mvpp2_port_loopback_set(struct mvpp2_port *port, else val &= ~MVPP2_GMAC_GMII_LB_EN_MASK; - if (port->phy_interface == PHY_INTERFACE_MODE_SGMII) + if (port->phy_interface == PHY_INTERFACE_MODE_SGMII || + port->phy_interface == PHY_INTERFACE_MODE_1000BASEX) val |= MVPP2_GMAC_PCS_LB_EN_MASK; else val &= ~MVPP2_GMAC_PCS_LB_EN_MASK; @@ -6266,7 +6272,8 @@ static irqreturn_t mvpp2_link_status_isr(int irq, void *dev_id) link = true; } } else if (phy_interface_mode_is_rgmii(port->phy_interface) || - port->phy_interface == PHY_INTERFACE_MODE_SGMII) { + port->phy_interface == PHY_INTERFACE_MODE_SGMII || + port->phy_interface == PHY_INTERFACE_MODE_1000BASEX) { val = readl(port->base + MVPP22_GMAC_INT_STAT); if (val & MVPP22_GMAC_INT_STAT_LINK) { event = true; @@ -8032,20 +8039,25 @@ static void mvpp2_phylink_validate(struct net_device *dev, phylink_set(mask, Pause); phylink_set(mask, Asym_Pause); - phylink_set(mask, 10baseT_Half); - phylink_set(mask, 10baseT_Full); - phylink_set(mask, 100baseT_Half); - phylink_set(mask, 100baseT_Full); - phylink_set(mask, 1000baseT_Full); - phylink_set(mask, 10000baseT_Full); - - if (state->interface == PHY_INTERFACE_MODE_10GKR) { + switch (state->interface) { + case PHY_INTERFACE_MODE_10GKR: phylink_set(mask, 10000baseCR_Full); phylink_set(mask, 10000baseSR_Full); phylink_set(mask, 10000baseLR_Full); phylink_set(mask, 10000baseLRM_Full); phylink_set(mask, 10000baseER_Full); phylink_set(mask, 10000baseKR_Full); + /* Fall-through */ + default: + phylink_set(mask, 10baseT_Half); + phylink_set(mask, 10baseT_Full); + phylink_set(mask, 100baseT_Half); + phylink_set(mask, 100baseT_Full); + phylink_set(mask, 10000baseT_Full); + /* Fall-through */ + case PHY_INTERFACE_MODE_1000BASEX: + phylink_set(mask, 1000baseT_Full); + phylink_set(mask, 1000baseX_Full); } bitmap_and(supported, supported, mask, __ETHTOOL_LINK_MODE_MASK_NBITS); @@ -8084,12 +8096,18 @@ static void mvpp2_gmac_link_state(struct mvpp2_port *port, state->link = !!(val & MVPP2_GMAC_STATUS0_LINK_UP); state->duplex = !!(val & MVPP2_GMAC_STATUS0_FULL_DUPLEX); - if (val & MVPP2_GMAC_STATUS0_GMII_SPEED) + switch (port->phy_interface) { + case PHY_INTERFACE_MODE_1000BASEX: state->speed = SPEED_1000; - else if (val & MVPP2_GMAC_STATUS0_MII_SPEED) - state->speed = SPEED_100; - else - state->speed = SPEED_10; + break; + default: + if (val & MVPP2_GMAC_STATUS0_GMII_SPEED) + state->speed = SPEED_1000; + else if (val & MVPP2_GMAC_STATUS0_MII_SPEED) + state->speed = SPEED_100; + else + state->speed = SPEED_10; + } state->pause = 0; if (val & MVPP2_GMAC_STATUS0_RX_PAUSE) @@ -8181,8 +8199,18 @@ static void mvpp2_gmac_config(struct mvpp2_port *port, unsigned int mode, ctrl0 &= ~MVPP2_GMAC_PORT_TYPE_MASK; ctrl2 &= ~(MVPP2_GMAC_PORT_RESET_MASK | MVPP2_GMAC_PCS_ENABLE_MASK); - if (!phy_interface_mode_is_rgmii(state->interface)) + if (state->interface == PHY_INTERFACE_MODE_1000BASEX) { + /* 1000BaseX port cannot negotiate speed nor can it negotiate + * duplex: they are always operating with a fixed speed of + * 1000Mbps in full duplex, so force 1000 speed and full duplex + * here. + */ + ctrl0 |= MVPP2_GMAC_PORT_TYPE_MASK; + an |= MVPP2_GMAC_CONFIG_GMII_SPEED | + MVPP2_GMAC_CONFIG_FULL_DUPLEX; + } else if (!phy_interface_mode_is_rgmii(state->interface)) { an |= MVPP2_GMAC_AN_SPEED_EN | MVPP2_GMAC_FLOW_CTRL_AUTONEG; + } if (state->duplex) an |= MVPP2_GMAC_CONFIG_FULL_DUPLEX; @@ -8191,7 +8219,8 @@ static void mvpp2_gmac_config(struct mvpp2_port *port, unsigned int mode, if (phylink_test(state->advertising, Asym_Pause)) an |= MVPP2_GMAC_FC_ADV_ASM_EN; - if (state->interface == PHY_INTERFACE_MODE_SGMII) { + if (state->interface == PHY_INTERFACE_MODE_SGMII || + state->interface == PHY_INTERFACE_MODE_1000BASEX) { an |= MVPP2_GMAC_IN_BAND_AUTONEG; ctrl2 |= MVPP2_GMAC_INBAND_AN_MASK | MVPP2_GMAC_PCS_ENABLE_MASK; @@ -8256,7 +8285,8 @@ static void mvpp2_mac_config(struct net_device *dev, unsigned int mode, if (state->interface == PHY_INTERFACE_MODE_10GKR) mvpp2_xlg_config(port, mode, state); else if (phy_interface_mode_is_rgmii(state->interface) || - state->interface == PHY_INTERFACE_MODE_SGMII) + state->interface == PHY_INTERFACE_MODE_SGMII || + state->interface == PHY_INTERFACE_MODE_1000BASEX) mvpp2_gmac_config(port, mode, state); if (port->priv->hw_version == MVPP21 && port->flags & MVPP2_F_LOOPBACK)