From patchwork Wed May 30 14:11:29 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Faiz Abbas X-Patchwork-Id: 10439077 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C25DE601E9 for ; Wed, 30 May 2018 14:20:49 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9DDAC28F66 for ; Wed, 30 May 2018 14:20:49 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 97FDF28F9B; Wed, 30 May 2018 14:20:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id BA7A128F75 for ; Wed, 30 May 2018 14:20:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Cr00m1bi5Ctq19NFW4DPpfmV0MUriWLamnrA/BetLlM=; b=N5BR0i8dhHj5TH I3iKmYRMQ+LXrWIbPvZt77J8XoYp1005SCaN7u5rRCutzGZlPwPd6M6o9IxirCB1u+8aHCzwvYUUc WgKz8CR6AHfAyXbiYOkJh0s96/gUwg3gVshQX2gV/72zHVUeHtb95gZBqYsFw6pIt/n2Q1//gtROd V6FTGlrieBLjZVnLzbFfjYcBKSQGjspuJ8+23j0LZDoCXjgpRR+/tYRtIoeflLpyS04n5FQd9K+er FAor9zRMHC54GIh34dIX1GJDeTlrwCw4RLGd/ZPdPguRjB4Zh+G9Gvn5CK2QGBElSONDphqAEvFog 1FCFtj4fHQq5s6aIhH6Q==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1fO1xn-0004Xy-2j; Wed, 30 May 2018 14:20:31 +0000 Received: from lelnx194.ext.ti.com ([198.47.27.80]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1fO1ny-00078d-UV for linux-arm-kernel@lists.infradead.org; Wed, 30 May 2018 14:10:27 +0000 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id w4UEA9AH015872; Wed, 30 May 2018 09:10:09 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1527689409; bh=TrtCegeIR0JjCkmA+xteXb30NyR5h9Sc/YNtffGEHBY=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=cSr/aVINBhRvPuXIVIIjRJxzBqiRTaVlgX3GqFwLbOXYIFMi6xEZnO6pVack3b28D eV9LdzcJBuhOBBpggkWaqebzFydyLHyeTC0ImEklcdva/NmENGKhx32nfU/2iJ1PN2 TdSkVdCya4JxwQboLE1s8vadDzzTwhSUMMaHMKRo= Received: from DFLE100.ent.ti.com (dfle100.ent.ti.com [10.64.6.21]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w4UEA9In014334; Wed, 30 May 2018 09:10:09 -0500 Received: from DFLE115.ent.ti.com (10.64.6.36) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Wed, 30 May 2018 09:10:09 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Wed, 30 May 2018 09:10:09 -0500 Received: from a0230074-OptiPlex-7010.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w4UE9wvL001195; Wed, 30 May 2018 09:10:06 -0500 From: Faiz Abbas To: , , , , Subject: [PATCH v2 2/6] ARM: dts: dra762: Add MCAN clock support Date: Wed, 30 May 2018 19:41:29 +0530 Message-ID: <20180530141133.3711-3-faiz_abbas@ti.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180530141133.3711-1-faiz_abbas@ti.com> References: <20180530141133.3711-1-faiz_abbas@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180530_071023_089754_591DF1F6 X-CRM114-Status: GOOD ( 14.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: paul@pwsan.com, tony@atomide.com, faiz_abbas@ti.com, t-kristo@ti.com, robh+dt@kernel.org, bcousson@baylibre.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Lokesh Vutla MCAN is clocked by H14 divider of DPLL_GMAC. Unlike other DPLL dividers this DPLL_GMAC H14 divider is controlled by control module. Adding support for these clocks. Signed-off-by: Lokesh Vutla Signed-off-by: Faiz Abbas --- arch/arm/boot/dts/dra76x.dtsi | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/arch/arm/boot/dts/dra76x.dtsi b/arch/arm/boot/dts/dra76x.dtsi index 1c88c581ff18..bfc82636999c 100644 --- a/arch/arm/boot/dts/dra76x.dtsi +++ b/arch/arm/boot/dts/dra76x.dtsi @@ -17,3 +17,36 @@ &crossbar_mpu { ti,irqs-skip = <10 67 68 133 139 140>; }; + +&scm_conf_clocks { + dpll_gmac_h14x2_ctrl_ck: dpll_gmac_h14x2_ctrl_ck@3fc { + #clock-cells = <0>; + compatible = "ti,divider-clock"; + clocks = <&dpll_gmac_x2_ck>; + ti,max-div = <63>; + reg = <0x03fc>; + ti,bit-shift=<20>; + ti,latch-bit=<26>; + assigned-clocks = <&dpll_gmac_h14x2_ctrl_ck>; + assigned-clock-rates = <80000000>; + }; + + dpll_gmac_h14x2_ctrl_mux_ck: dpll_gmac_h14x2_ctrl_mux_ck@3fc { + #clock-cells = <0>; + compatible = "ti,mux-clock"; + clocks = <&dpll_gmac_ck>, <&dpll_gmac_h14x2_ctrl_ck>; + reg = <0x3fc>; + ti,bit-shift = <29>; + ti,latch-bit=<26>; + assigned-clocks = <&dpll_gmac_h14x2_ctrl_mux_ck>; + assigned-clock-parents = <&dpll_gmac_h14x2_ctrl_ck>; + }; + + mcan_clk: mcan_clk@3fc { + #clock-cells = <0>; + compatible = "ti,gate-clock"; + clocks = <&dpll_gmac_h14x2_ctrl_mux_ck>; + ti,bit-shift = <27>; + reg = <0x3fc>; + }; +};