From patchwork Tue Jun 19 12:58:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 10474291 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 510CD601D7 for ; Tue, 19 Jun 2018 13:09:13 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 43B4A28B93 for ; Tue, 19 Jun 2018 13:09:13 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 385E728BA5; Tue, 19 Jun 2018 13:09:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id EF5BD28B93 for ; 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Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70] helo=foss.arm.com) by casper.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1fVGDJ-0002I3-L3 for linux-arm-kernel@lists.infradead.org; Tue, 19 Jun 2018 12:58:29 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D3FB41596; Tue, 19 Jun 2018 05:58:14 -0700 (PDT) Received: from edgewater-inn.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A54933F557; Tue, 19 Jun 2018 05:58:14 -0700 (PDT) Received: by edgewater-inn.cambridge.arm.com (Postfix, from userid 1000) id 4A5D81AE35A5; Tue, 19 Jun 2018 13:58:50 +0100 (BST) Date: Tue, 19 Jun 2018 13:58:50 +0100 From: Will Deacon To: Mathieu Desnoyers Subject: Re: [PATCH] arm: Hook up SYNC_CORE functionality for sys_membarrier() Message-ID: <20180619125849.GH13984@arm.com> References: <1529410974-18929-1-git-send-email-will.deacon@arm.com> <1431651959.17300.1529412602455.JavaMail.zimbra@efficios.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1431651959.17300.1529412602455.JavaMail.zimbra@efficios.com> User-Agent: Mutt/1.5.23 (2014-03-12) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180619_135825_936651_99A80957 X-CRM114-Status: GOOD ( 22.09 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Orion Hodson , linux-arm-kernel Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Hi Mathieu, On Tue, Jun 19, 2018 at 08:50:02AM -0400, Mathieu Desnoyers wrote: > ----- On Jun 19, 2018, at 8:22 AM, Will Deacon will.deacon@arm.com wrote: > > > Exception return implies context synchronization, so we can hook up the > > SYNC_CORE option to sys_membarrier() simply by selecting the Kconfig option, > > just like we've done for arm64 already. > > > > Cc: Mathieu Desnoyers > > Cc: Orion Hodson > > Signed-off-by: Will Deacon > > --- > > arch/arm/Kconfig | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > > index 54eeb8d00bc6..b0ac18547370 100644 > > --- a/arch/arm/Kconfig > > +++ b/arch/arm/Kconfig > > @@ -9,6 +9,7 @@ config ARM > > select ARCH_HAS_ELF_RANDOMIZE > > select ARCH_HAS_FORTIFY_SOURCE > > select ARCH_HAS_KCOV > > + select ARCH_HAS_MEMBARRIER_SYNC_CORE > > In addition to this, we added this comment in arch/arm64/kernel/entry.S: > > + /* > + * ARCH_HAS_MEMBARRIER_SYNC_CORE rely on eret context synchronization > + * when returning from IPI handler, and when returning to user-space. > + */ > > So I would expect a similar comment in arch/arm/kernel/entry-header.S, within > svc_exit and svc_exit_via_fiq: > > /* > * ARCH_HAS_MEMBARRIER_SYNC_CORE rely on [insn] context synchronization > * when returning from IPI handler, and when returning to user-space. > */ Bah, you know I hate that comment ;) I should update arch-support.txt, though. Diff below. > Which instruction exactly is responsible for context synchronization on > arm32 ? It's the act of doing an exception return, so there are multiple instruction sequences to do that on 32-bit arm. Will --->8 diff --git a/Documentation/features/sched/membarrier-sync-core/arch-support.txt b/Documentation/features/sched/membarrier-sync-core/arch-support.txt index dbdf62907703..c7858dd1ea8f 100644 --- a/Documentation/features/sched/membarrier-sync-core/arch-support.txt +++ b/Documentation/features/sched/membarrier-sync-core/arch-support.txt @@ -5,10 +5,10 @@ # # Architecture requirements # -# * arm64 +# * arm/arm64 # -# Rely on eret context synchronization when returning from IPI handler, and -# when returning to user-space. +# Rely on implicit context synchronization as a result of exception return +# when returning from IPI handler, and when returning to user-space. # # * x86 # @@ -31,7 +31,7 @@ ----------------------- | alpha: | TODO | | arc: | TODO | - | arm: | TODO | + | arm: | ok | | arm64: | ok | | c6x: | TODO | | h8300: | TODO |