@@ -187,6 +187,77 @@
aspeed,external-nodes = <&gfx &lhc>;
};
+
+ field@2c.16 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0x2c>;
+ mask = <0x00030000>;
+ label = "dac-mux";
+ };
+
+ field@50.0 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0x50>;
+ mask = <0xffffffff>;
+ label = "vga0";
+ read-only;
+ };
+
+ field@54.0 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0x54>;
+ mask = <0xffffffff>;
+ label = "vga1";
+ read-only;
+ };
+
+ field@58.0 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0x58>;
+ mask = <0xffffffff>;
+ label = "vga2";
+ read-only;
+ };
+
+ field@5c.0 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0x5c>;
+ mask = <0xffffffff>;
+ label = "vga3";
+ read-only;
+ };
+
+ field@60.0 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0x60>;
+ mask = <0xffffffff>;
+ label = "vga4";
+ read-only;
+ };
+
+ field@64.0 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0x64>;
+ mask = <0xffffffff>;
+ label = "vga5";
+ read-only;
+ };
+
+ field@68.0 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0x68>;
+ mask = <0xffffffff>;
+ label = "vga6";
+ read-only;
+ };
+
+ field@6c.0 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0x6c>;
+ mask = <0xffffffff>;
+ label = "vga7";
+ read-only;
+ };
};
rng: hwrng@1e6e2078 {
@@ -343,6 +414,127 @@
#reset-cells = <1>;
};
+ field@f0.24 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0xf0>;
+ mask = <0xff000000>;
+ label = "sio2b";
+ };
+
+ field@f0.16 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0xf0>;
+ mask = <0x00ff0000>;
+ label = "sio2a";
+ };
+
+ field@f0.8 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0xf0>;
+ mask = <0x0000ff00>;
+ bit-shift = <8>;
+ label = "sio29";
+ };
+
+ field@f0.0 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0xf0>;
+ mask = <0x000000ff>;
+ label = "sio28";
+ };
+
+ field@f4.24 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0xf4>;
+ mask = <0xff000000>;
+ label = "sio2f";
+ };
+
+ field@f4.16 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0xf4>;
+ mask = <0x00ff0000>;
+ label = "sio2e";
+ };
+
+ field@f4.8 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0xf4>;
+ mask = <0x0000ff00>;
+ label = "sio2d";
+ };
+
+ field@f4.0 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0xf4>;
+ mask = <0x000000ff>;
+ label = "sio2c";
+ };
+
+ field@f8.24 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0xf8>;
+ mask = <0xff000000>;
+ read-only;
+ label = "sio23";
+ };
+
+ field@f8.16 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0xf8>;
+ mask = <0x00ff0000>;
+ read-only;
+ label = "sio22";
+ };
+
+ field@f8.8 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0xf8>;
+ mask = <0x0000ff00>;
+ read-only;
+ label = "sio21";
+ };
+
+ field@f8.0 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0xf8>;
+ mask = <0x000000ff>;
+ read-only;
+ label = "sio20";
+ };
+
+ field@fc.24 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0xfc>;
+ mask = <0xff000000>;
+ read-only;
+ label = "sio27";
+ };
+
+ field@fc.16 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0xfc>;
+ mask = <0x00ff0000>;
+ read-only;
+ label = "sio26";
+ };
+
+ field@fc.8 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0xfc>;
+ mask = <0x0000ff00>;
+ read-only;
+ label = "sio25";
+ };
+
+ field@fc.0 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0xfc>;
+ mask = <0x000000ff>;
+ read-only;
+ label = "sio24";
+ };
+
ibt: ibt@c0 {
compatible = "aspeed,ast2500-ibt-bmc";
reg = <0xc0 0x18>;
The AST2500 has VGA scratch registers that are read-only, SuperIO scratch registers that are a mix of read-only and read-write, and a graphics DAC mux that must be read or configured in the process of booting e.g. an OpenPOWER system. These capabilities do not really have a place in other drivers, so expose them as fields via bmc-misc-ctrl. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> --- Since RFC v1: * Rework labels to what is documented in the bindings * Fix an incorrect offset property arch/arm/boot/dts/aspeed-g5.dtsi | 192 +++++++++++++++++++++++++++++++ 1 file changed, 192 insertions(+)