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a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:in-reply-to:message-id :references:subject:to:x-me-sender:x-me-sender:x-sasl-enc; s= fm3; bh=NrfYnPkuiuZhDakJR+pWhWIu4JzsTglHCS/Eh/v5mKQ=; b=EuhdQTGV FUeShqgVDXd24VBIG4AIDBbJUJoR8p5XcX+d/FjTntdnA2hR1/bT7OIWldYV8tpm dWS5H3zoWayIB5hl8Cjm5Rauk8L/c+5SZ5Zyvbz32KGf71p4FPeGqQ9B4K68/Jy5 q2giG7CJIBVvMEInFJE0MsHH18s34j5aRqZ2FvHk1R+pgaFu85lnXuqDCdGP5Phb PngWG3yMBkiwSSSfJEonmSSv95fjdd85QwP6b9UzqMZMrLlc/8DyVcvchZ71lnz+ 6T3Kw2823ioOq2qpjX6K2Tf2RcWQAEu/NAVzr1Z0Ziot/zdHer4bXbEunH4vf6FU GtxkVTcDwuBf/Q== X-ME-Proxy: X-ME-Sender: Received: from indium.zzz.sholland.net (mobile-107-77-172-88.mobile.att.net [107.77.172.88]) by mail.messagingengine.com (Postfix) with ESMTPA id 78121E4519; Wed, 11 Jul 2018 22:25:21 -0400 (EDT) From: Samuel Holland To: Maxime Ripard , Chen-Yu Tsai , Catalin Marinas , Will Deacon , Daniel Lezcano , Thomas Gleixner , Marc Zyngier , Mark Rutland Subject: [PATCH v2 2/2] arm64: dts: allwinner: a64: Enable A64 timer workaround Date: Wed, 11 Jul 2018 21:25:15 -0500 Message-Id: <20180712022515.7255-3-samuel@sholland.org> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20180712022515.7255-1-samuel@sholland.org> References: <20180712022515.7255-1-samuel@sholland.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180711_192530_431965_527723EB X-CRM114-Status: GOOD ( 10.29 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-sunxi@googlegroups.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Samuel Holland MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP As instability in the architectural timer has been observed on multiple devices using this SoC, inluding the Pine64 and the Orange Pi Win, enable the workaround in the SoC's device tree. Signed-off-by: Samuel Holland --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index 1b2ef28c42bd..5202b76e9684 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -152,6 +152,7 @@ timer { compatible = "arm,armv8-timer"; + allwinner,sun50i-a64-unstable-timer; interrupts = ,