Message ID | 20180910115935.163121-2-lkundrak@v3.sk (mailing list archive) |
---|---|
State | Superseded, archived |
Headers | show |
Series | Make SPI work on DT MMP2 | expand |
On Mon, Sep 10, 2018 at 01:59:31PM +0200, Lubomir Rintel wrote: > This is the SPI controller found on Marvel MMP2 and perhaps more > platforms. > > Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> > --- > .../devicetree/bindings/spi/spi-pxa2xx.txt | 24 +++++++++++++++++++ > 1 file changed, 24 insertions(+) > create mode 100644 Documentation/devicetree/bindings/spi/spi-pxa2xx.txt > > diff --git a/Documentation/devicetree/bindings/spi/spi-pxa2xx.txt b/Documentation/devicetree/bindings/spi/spi-pxa2xx.txt > new file mode 100644 > index 000000000000..75be87cf9909 > --- /dev/null > +++ b/Documentation/devicetree/bindings/spi/spi-pxa2xx.txt > @@ -0,0 +1,24 @@ > +PXA2xx SSP SPI Controller > + > +Required properties: > +- compatible: Must be "marvell,mmp2-ssp". > +- reg: Offset and length of the device's register set. > +- interrupts: Should be the interrupt number. > +- clocks: Should contain a single entry describing the clock input. > +- #address-cells: Number of cells required to define a chip select address. > +- #size-cells: Should be zero. > + > +Optional properties: > +- cs-gpios: list of GPIO chip selects. See the SPI bus bindings, > + Documentation/devicetree/bindings/spi/spi-bus.txt > + > +Child nodes represent devices on the SPI bus > + See ../spi/spi-bus.txt > + > +Example: > + ssp1: ssp@d4035000 { spi@... Otherwise, Reviewed-by: Rob Herring <robh@kernel.org> > + compatible = "marvell,mmp2-ssp"; > + reg = <0xd4035000 0x1000>; > + clocks = <&soc_clocks MMP2_CLK_SSP0>; > + interrupts = <0>; > + }; > -- > 2.17.1 >
diff --git a/Documentation/devicetree/bindings/spi/spi-pxa2xx.txt b/Documentation/devicetree/bindings/spi/spi-pxa2xx.txt new file mode 100644 index 000000000000..75be87cf9909 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-pxa2xx.txt @@ -0,0 +1,24 @@ +PXA2xx SSP SPI Controller + +Required properties: +- compatible: Must be "marvell,mmp2-ssp". +- reg: Offset and length of the device's register set. +- interrupts: Should be the interrupt number. +- clocks: Should contain a single entry describing the clock input. +- #address-cells: Number of cells required to define a chip select address. +- #size-cells: Should be zero. + +Optional properties: +- cs-gpios: list of GPIO chip selects. See the SPI bus bindings, + Documentation/devicetree/bindings/spi/spi-bus.txt + +Child nodes represent devices on the SPI bus + See ../spi/spi-bus.txt + +Example: + ssp1: ssp@d4035000 { + compatible = "marvell,mmp2-ssp"; + reg = <0xd4035000 0x1000>; + clocks = <&soc_clocks MMP2_CLK_SSP0>; + interrupts = <0>; + };
This is the SPI controller found on Marvel MMP2 and perhaps more platforms. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> --- .../devicetree/bindings/spi/spi-pxa2xx.txt | 24 +++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-pxa2xx.txt