| Message ID | 20180922181709.13007-5-gregory.clement@bootlin.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add CPU clock support for Armada 7K/8K | expand |
Quoting Gregory CLEMENT (2018-09-22 11:17:07) > Actually, the clocks exposed for the cluster are not the CPU clocks, but > the PLL clock used as entry clock for the CPU clocks. The CPU clock will > be managed by a driver submitting in the following patches. > > Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Does this need a fixes tag?
Hi Stephen, On mer., oct. 17 2018, Stephen Boyd <sboyd@kernel.org> wrote: > Quoting Gregory CLEMENT (2018-09-22 11:17:07) >> Actually, the clocks exposed for the cluster are not the CPU clocks, but >> the PLL clock used as entry clock for the CPU clocks. The CPU clock will >> be managed by a driver submitting in the following patches. >> >> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> > > Does this need a fixes tag? It doesn't fix a regression so I don't thing it needs a fixes tag. Gregory >
Quoting Gregory CLEMENT (2018-11-23 06:42:24) > Hi Stephen, > > On mer., oct. 17 2018, Stephen Boyd <sboyd@kernel.org> wrote: > > > Quoting Gregory CLEMENT (2018-09-22 11:17:07) > >> Actually, the clocks exposed for the cluster are not the CPU clocks, but > >> the PLL clock used as entry clock for the CPU clocks. The CPU clock will > >> be managed by a driver submitting in the following patches. > >> > >> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> > > > > Does this need a fixes tag? > > It doesn't fix a regression so I don't thing it needs a fixes tag. > Would it help anyone who is backporting the stack of patches to support this? I would liberally add a Fixes tag here in case it helps anyone learn that this was incorrect all along.
diff --git a/drivers/clk/mvebu/ap806-system-controller.c b/drivers/clk/mvebu/ap806-system-controller.c index 0a58824ff053..73ba8fd7860f 100644 --- a/drivers/clk/mvebu/ap806-system-controller.c +++ b/drivers/clk/mvebu/ap806-system-controller.c @@ -97,7 +97,7 @@ static int ap806_syscon_common_probe(struct platform_device *pdev, cpuclk_freq *= 1000 * 1000; /* CPU clocks depend on the Sample At Reset configuration */ - name = ap_cp_unique_name(dev, syscon_node, "cpu-cluster-0"); + name = ap_cp_unique_name(dev, syscon_node, "pll-cluster-0"); ap806_clks[0] = clk_register_fixed_rate(dev, name, NULL, 0, cpuclk_freq); if (IS_ERR(ap806_clks[0])) { @@ -105,7 +105,7 @@ static int ap806_syscon_common_probe(struct platform_device *pdev, goto fail0; } - name = ap_cp_unique_name(dev, syscon_node, "cpu-cluster-1"); + name = ap_cp_unique_name(dev, syscon_node, "pll-cluster-1"); ap806_clks[1] = clk_register_fixed_rate(dev, name, NULL, 0, cpuclk_freq); if (IS_ERR(ap806_clks[1])) {
Actually, the clocks exposed for the cluster are not the CPU clocks, but the PLL clock used as entry clock for the CPU clocks. The CPU clock will be managed by a driver submitting in the following patches. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> --- drivers/clk/mvebu/ap806-system-controller.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)