From patchwork Mon Oct 1 14:13:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 10622165 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B09141515 for ; Mon, 1 Oct 2018 14:15:49 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9CB7828C45 for ; Mon, 1 Oct 2018 14:15:49 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9011B28D71; Mon, 1 Oct 2018 14:15:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_NONE autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 269D228C45 for ; Mon, 1 Oct 2018 14:15:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=AToR+MIIbRycf1ezW726q1Z9Je22JRUlvcBO5RDzs34=; b=WnFJ2kbGSJAkbjbrCEmpBqSGoD cSHJqHgDkVqq3nQQnnMZDscoV8Vj78uc5wTjL9OxdgAQBu2+BqBct/+/bI4uNmm3w1pisPoW1E6z/ ryKuVtZBI5ZcrLC+a4eAbQUNnMR6Ax5S9uuB8hylCor0/4pFmNd4aocH+RW5ULUk3FC7kJ24nfNi5 aLN6OPtOk1lAVF0Wiui5UfWJj2LdfA+ZPl4UMumzVuLvSVaMLA5czWn5qZj/XJiX4FD8e4VCFHKn7 /3DQ2u4K0NpVehBPskXDEL6q3CcrbrINwEQ9DSW67Xc+fWQCriXSxuv5i7y8malFI+5bMtl4bTB4c BcYX6K2w==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1g6yz9-00053K-Qj; Mon, 01 Oct 2018 14:15:43 +0000 Received: from mail.bootlin.com ([62.4.15.54]) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1g6yyA-0003L3-4x for linux-arm-kernel@lists.infradead.org; Mon, 01 Oct 2018 14:14:56 +0000 Received: by mail.bootlin.com (Postfix, from userid 110) id 033F820379; Mon, 1 Oct 2018 16:14:30 +0200 (CEST) Received: from localhost.localdomain (AAubervilliers-681-1-24-95.w90-88.abo.wanadoo.fr [90.88.144.95]) by mail.bootlin.com (Postfix) with ESMTPSA id 4DE4D20AB9; Mon, 1 Oct 2018 16:14:00 +0200 (CEST) From: Miquel Raynal To: Marc Zyngier Subject: [PATCH v6 04/14] irqchip/irq-mvebu-icu: clarify the reset operation of configured interrupts Date: Mon, 1 Oct 2018 16:13:48 +0200 Message-Id: <20181001141358.31508-5-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181001141358.31508-1-miquel.raynal@bootlin.com> References: <20181001141358.31508-1-miquel.raynal@bootlin.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181001_071442_349823_A22EEF05 X-CRM114-Status: GOOD ( 13.91 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Andrew Lunn , Jason Cooper , devicetree@vger.kernel.org, Antoine Tenart , Catalin Marinas , Gregory Clement , Haim Boot , Will Deacon , Maxime Chevallier , Nadav Haklai , Rob Herring , Thomas Petazzoni , Miquel Raynal , Thomas Gleixner , Hanna Hawa , linux-arm-kernel@lists.infradead.org, Sebastian Hesselbarth MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Rewrite a small section to clarify the reset operation of interrupts already configured by ATF that we want to handle in the driver. This will simplify the introduction of System Error Interrupts support. Signed-off-by: Miquel Raynal Reviewed-by: Thomas Petazzoni --- drivers/irqchip/irq-mvebu-icu.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/irqchip/irq-mvebu-icu.c b/drivers/irqchip/irq-mvebu-icu.c index a2a3acd74491..0f2655d7f19e 100644 --- a/drivers/irqchip/irq-mvebu-icu.c +++ b/drivers/irqchip/irq-mvebu-icu.c @@ -258,8 +258,12 @@ static int mvebu_icu_probe(struct platform_device *pdev) * avoid unpredictable SPI assignments done by firmware. */ for (i = 0 ; i < ICU_MAX_IRQS ; i++) { - u32 icu_int = readl_relaxed(icu->base + ICU_INT_CFG(i)); - if ((icu_int >> ICU_GROUP_SHIFT) == ICU_GRP_NSR) + u32 icu_int, icu_grp; + + icu_int = readl_relaxed(icu->base + ICU_INT_CFG(i)); + icu_grp = icu_int >> ICU_GROUP_SHIFT; + + if (icu_grp == ICU_GRP_NSR) writel_relaxed(0x0, icu->base + ICU_INT_CFG(i)); }