From patchwork Tue Oct 2 08:54:16 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 10623265 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6C713112B for ; Tue, 2 Oct 2018 08:55:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 417DD28779 for ; Tue, 2 Oct 2018 08:55:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 357872877E; Tue, 2 Oct 2018 08:55:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_NONE autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 8DD2228779 for ; Tue, 2 Oct 2018 08:55:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=NibCEccgHIX114+owCiSt5dAUiTt07e9swFc1mQv/yk=; b=TBqc+ortE65wj7 F7vM3M7TRuvnOHoYDl0dRJtRohlpgkzvewdcJizheLHYO3YlhOzOLPRMjAc9obNgfHwDec6rIhhFP GiOyZ5Q3nO5ug8JBlFWgbSW3BoZGoHxjL1dm1G6ZyxFFF2exsHvvDnpCQIsK6Dh1lZUkE0+yL+Ftm qkmhQWsdUeRyUby+zRHfFXbunR01ma8sm0U2YWujf4zScpIipWj5H+ee94e7tQOXNMT3Ws9YCn+Q+ 9R94+TXljOUuxsYlxogT0M76tx30lkJ8saTehnnA/8ZDfU7RMVMYvwI76Hl1V4HSTajM++jLtwB2I LvQSDmdlezahhw1VFYjQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1g7GSp-0002iV-Ik; Tue, 02 Oct 2018 08:55:31 +0000 Received: from mail.bootlin.com ([62.4.15.54]) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1g7GRo-0001Hq-64 for linux-arm-kernel@lists.infradead.org; Tue, 02 Oct 2018 08:55:28 +0000 Received: by mail.bootlin.com (Postfix, from userid 110) id 70B8320728; Tue, 2 Oct 2018 10:54:16 +0200 (CEST) Received: from xps13 (AAubervilliers-681-1-24-95.w90-88.abo.wanadoo.fr [90.88.144.95]) by mail.bootlin.com (Postfix) with ESMTPSA id D39262071E; Tue, 2 Oct 2018 10:54:15 +0200 (CEST) Date: Tue, 2 Oct 2018 10:54:16 +0200 From: Miquel Raynal To: Marc Zyngier Subject: [PATCH v7 06/14] irqchip/irq-mvebu-icu: support ICU subnodes Message-ID: <20181002105416.70b93857@xps13> In-Reply-To: <86k1n1vcgb.wl-marc.zyngier@arm.com> References: <20181001141358.31508-1-miquel.raynal@bootlin.com> <20181001141358.31508-7-miquel.raynal@bootlin.com> <86k1n1vcgb.wl-marc.zyngier@arm.com> Organization: Bootlin X-Mailer: Claws Mail 3.16.0 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181002_015428_604979_56C01D8B X-CRM114-Status: GOOD ( 21.91 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Andrew Lunn , Jason Cooper , devicetree@vger.kernel.org, Antoine Tenart , Catalin Marinas , Gregory Clement , Haim Boot , Will Deacon , Maxime Chevallier , Nadav Haklai , Rob Herring , Thomas Petazzoni , Thomas Gleixner , Hanna Hawa , linux-arm-kernel@lists.infradead.org, Sebastian Hesselbarth Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The ICU can handle several type of interrupt, each of them being handled differently on AP side. On CP side, the ICU should be able to make the distinction between each interrupt group by pointing to the right parent. This is done through the introduction of new bindings, presenting the ICU node as the parent of multiple ICU sub-nodes, each of them being an interrupt type with a different interrupt parent. ICU interrupt 'clients' now directly point to the right sub-node, avoiding the need for the extra ICU_GRP_* parameter. ICU subnodes are probed automatically with devm_platform_populate(). If the node as no child, the probe function for NSRs will still be called 'manually' in order to preserve backward compatibility with DT using the old binding. Signed-off-by: Miquel Raynal --- Changes since v6: ----------------- * Used the static key at the top of the mvebu_icu_subset_probe() function. drivers/irqchip/irq-mvebu-icu.c | 73 +++++++++++++++++++++++++-------- 1 file changed, 57 insertions(+), 16 deletions(-) diff --git a/drivers/irqchip/irq-mvebu-icu.c b/drivers/irqchip/irq-mvebu-icu.c index d09f220a2701..d0b1994e2a6f 100644 --- a/drivers/irqchip/irq-mvebu-icu.c +++ b/drivers/irqchip/irq-mvebu-icu.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -49,6 +50,8 @@ struct mvebu_icu_irq_data { unsigned int type; }; +DEFINE_STATIC_KEY_FALSE(legacy_bindings); + static void mvebu_icu_init(struct mvebu_icu *icu, struct msi_msg *msg) { if (atomic_cmpxchg(&icu->initialized, false, true)) @@ -105,32 +108,33 @@ mvebu_icu_irq_domain_translate(struct irq_domain *d, struct irq_fwspec *fwspec, unsigned long *hwirq, unsigned int *type) { struct mvebu_icu *icu = platform_msi_get_host_data(d); - unsigned int icu_group; + unsigned int param_count = static_branch_unlikely(&legacy_bindings) ? 3 : 2; /* Check the count of the parameters in dt */ - if (WARN_ON(fwspec->param_count < 3)) { + if (WARN_ON(fwspec->param_count != param_count)) { dev_err(icu->dev, "wrong ICU parameter count %d\n", fwspec->param_count); return -EINVAL; } - /* Only ICU group type is handled */ - icu_group = fwspec->param[0]; - if (icu_group != ICU_GRP_NSR && icu_group != ICU_GRP_SR && - icu_group != ICU_GRP_SEI && icu_group != ICU_GRP_REI) { - dev_err(icu->dev, "wrong ICU group type %x\n", icu_group); - return -EINVAL; + if (static_branch_unlikely(&legacy_bindings)) { + *hwirq = fwspec->param[1]; + *type = fwspec->param[2] & IRQ_TYPE_SENSE_MASK; + if (fwspec->param[0] != ICU_GRP_NSR) { + dev_err(icu->dev, "wrong ICU group type %x\n", + fwspec->param[0]); + return -EINVAL; + } + } else { + *hwirq = fwspec->param[0]; + *type = fwspec->param[1] & IRQ_TYPE_SENSE_MASK; } - *hwirq = fwspec->param[1]; if (*hwirq >= ICU_MAX_IRQS) { dev_err(icu->dev, "invalid interrupt number %ld\n", *hwirq); return -EINVAL; } - /* Mask the type to prevent wrong DT configuration */ - *type = fwspec->param[2] & IRQ_TYPE_SENSE_MASK; - return 0; } @@ -155,7 +159,10 @@ mvebu_icu_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, goto free_irqd; } - icu_irqd->icu_group = fwspec->param[0]; + if (static_branch_unlikely(&legacy_bindings)) + icu_irqd->icu_group = fwspec->param[0]; + else + icu_irqd->icu_group = ICU_GRP_NSR; icu_irqd->icu = icu; err = platform_msi_domain_alloc(domain, virq, nr_irqs); @@ -203,6 +210,13 @@ static const struct irq_domain_ops mvebu_icu_domain_ops = { .free = mvebu_icu_irq_domain_free, }; +static const struct of_device_id mvebu_icu_subset_of_match[] = { + { + .compatible = "marvell,cp110-icu-nsr", + }, + {}, +}; + static int mvebu_icu_subset_probe(struct platform_device *pdev) { struct device_node *msi_parent_dn; @@ -210,7 +224,10 @@ static int mvebu_icu_subset_probe(struct platform_device *pdev) struct irq_domain *irq_domain; struct mvebu_icu *icu; - icu = dev_get_drvdata(dev); + if (static_branch_unlikely(&legacy_bindings)) + icu = dev_get_drvdata(dev); + else + icu = dev_get_drvdata(dev->parent); dev->msi_domain = of_msi_get_domain(dev, dev->of_node, DOMAIN_BUS_PLATFORM_MSI); @@ -233,6 +250,15 @@ static int mvebu_icu_subset_probe(struct platform_device *pdev) return 0; } +static struct platform_driver mvebu_icu_subset_driver = { + .probe = mvebu_icu_subset_probe, + .driver = { + .name = "mvebu-icu-subset", + .of_match_table = mvebu_icu_subset_of_match, + }, +}; +builtin_platform_driver(mvebu_icu_subset_driver); + static int mvebu_icu_probe(struct platform_device *pdev) { struct mvebu_icu *icu; @@ -259,6 +285,16 @@ static int mvebu_icu_probe(struct platform_device *pdev) if (!icu->irq_chip.name) return -ENOMEM; + /* + * Legacy bindings: ICU is one node with one MSI parent: force manually + * the probe of the NSR interrupts side. + * New bindings: ICU node has children, one per interrupt controller + * having its own MSI parent: call platform_populate(). + * All ICU instances should use the same bindings. + */ + if (!of_get_child_count(pdev->dev.of_node)) + static_branch_enable(&legacy_bindings); + icu->irq_chip.irq_mask = irq_chip_mask_parent; icu->irq_chip.irq_unmask = irq_chip_unmask_parent; icu->irq_chip.irq_eoi = irq_chip_eoi_parent; @@ -277,13 +313,18 @@ static int mvebu_icu_probe(struct platform_device *pdev) icu_int = readl_relaxed(icu->base + ICU_INT_CFG(i)); icu_grp = icu_int >> ICU_GROUP_SHIFT; - if (icu_grp == ICU_GRP_NSR) + if (icu_grp == ICU_GRP_NSR || + (icu_grp == ICU_GRP_SEI && + !static_branch_unlikely(&legacy_bindings))) writel_relaxed(0x0, icu->base + ICU_INT_CFG(i)); } platform_set_drvdata(pdev, icu); - return mvebu_icu_subset_probe(pdev); + if (static_branch_unlikely(&legacy_bindings)) + return mvebu_icu_subset_probe(pdev); + else + return devm_of_platform_populate(&pdev->dev); } static const struct of_device_id mvebu_icu_of_match[] = {