Message ID | 20181103100900.30313-9-jagan@amarulasolutions.com (mailing list archive) |
---|---|
State | Superseded, archived |
Headers | show |
Series | drm/sun4i: Allwinner MIPI-DSI Burst mode support | expand |
On Sat, 3 Nov 2018 15:38:58 +0530, Jagan Teki wrote: > Feiyang FY07024DI26A30-D is 1024x600, 4-lane MIPI-DSI LCD panel. > > Add dt-bingings for it. > > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> > --- > .../display/panel/feiyang,fy07024di26a30d.txt | 20 +++++++++++++++++++ > 1 file changed, 20 insertions(+) > create mode 100644 Documentation/devicetree/bindings/display/panel/feiyang,fy07024di26a30d.txt > Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/display/panel/feiyang,fy07024di26a30d.txt b/Documentation/devicetree/bindings/display/panel/feiyang,fy07024di26a30d.txt new file mode 100644 index 000000000000..82caa7b65ae8 --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/feiyang,fy07024di26a30d.txt @@ -0,0 +1,20 @@ +Feiyang FY07024DI26A30-D 7" MIPI-DSI LCD Panel + +Required properties: +- compatible: must be "feiyang,fy07024di26a30d" +- reg: DSI virtual channel used by that screen +- avdd-supply: analog regulator dc1 switch +- dvdd-supply: 3v3 digital regulator +- reset-gpios: a GPIO phandle for the reset pin + +Optional properties: +- backlight: phandle for the backlight control. + +panel@0 { + compatible = "feiyang,fy07024di26a30d"; + reg = <0>; + avdd-supply = <®_dc1sw>; + dvdd-supply = <®_dldo2>; + reset-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* LCD-RST: PD24 */ + backlight = <&backlight>; +};
Feiyang FY07024DI26A30-D is 1024x600, 4-lane MIPI-DSI LCD panel. Add dt-bingings for it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> --- .../display/panel/feiyang,fy07024di26a30d.txt | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/panel/feiyang,fy07024di26a30d.txt