From patchwork Mon Nov 5 12:06:47 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Brown X-Patchwork-Id: 10668201 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2F37A1751 for ; Mon, 5 Nov 2018 12:56:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1E07F28D72 for ; Mon, 5 Nov 2018 12:56:06 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0FC6D28CF0; Mon, 5 Nov 2018 12:56:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.6 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_LOW autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 839A128396 for ; Mon, 5 Nov 2018 12:56:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Date:Message-Id: In-Reply-To:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: References:List-Owner; bh=No/qq4GbOuN4cSpgd/3I6fuNjXhR0qbu9AZSgPvGV20=; b=HvV oQEN2PaXG2mZkaNeRGOW8O9G9lbcQNnj3gyiWT1Sf2tGRtB9nTQaWmedCfV71GCyEPEGjXawinElK mYaSdOuIdPbeBcRl1hDXYPzU3wY6FewxnasGq2AVMF+u+5yxeuh4Nnv9oKHf36k7beDHPLws5t/bS N02a2JMS+z+73grP+wEks4TysuQN9tTOew/IgGvqPoIC8O69cG/hq7IUXdnLao2yKHnMrMuLRDyb7 CORZvwXcOmZaL0atu5sqSNhjopAJm63C67LqxgI8PyGAdS7WAH/z49vpk04fENhyyVNaAC8AheOHx BPAzUenukj5y93NDrLSFRlIWHRwGVcg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gJeQF-00006Q-3r; Mon, 05 Nov 2018 12:56:03 +0000 Received: from merlin.infradead.org ([2001:8b0:10b:1231::1]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1gJeIT-00034E-5b; Mon, 05 Nov 2018 12:48:01 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=merlin.20170209; h=Date:Message-Id:In-Reply-To:Subject:Cc: To:From:Sender:Reply-To:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:References:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=KG8Mqiq+fBqT8G5nzXj7cCbwijfOZaHrHGYnzpTLX7s=; b=0wciLjSKEo8QxUhKgdAQNU2hfC mzGEeQNxUgaZ8J/AL+0DRYEZ0VJSGSAx5iJBJxX0poOnHRaI6M3qWiXcncRFT92sWmhEYUlPKh16G KQzhE96OiZ0Dgh/1Z32IaaIFGNwratFVkQdj1mLg53kVGlu3mlvf8fmMlhVGeEhOaDAojJBVx+K5f ++PIpaszPYRde5euc2dstHFDPyxLzbffAAm7D9BSpTrNKQ8hGdCceA7+82xqPnQOq69pThMsOO5Fq rn9ZgrZu/r3ehAeqtPEstg9c9Tq2ot8IxbL7j2qyWCYh0ugQanvP0CjQK7kFWV9cZoI0VaX3+M460 8RgRD6PQ==; Received: from heliosphere.sirena.org.uk ([2a01:7e01::f03c:91ff:fed4:a3b6]) by merlin.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1gJdeh-0004fY-UF; Mon, 05 Nov 2018 12:06:57 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sirena.org.uk; s=20170815-heliosphere; h=Date:Message-Id:In-Reply-To: Subject:Cc:To:From:Sender:Reply-To:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:References: List-Id:List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner: List-Archive; bh=KG8Mqiq+fBqT8G5nzXj7cCbwijfOZaHrHGYnzpTLX7s=; b=o0dyFsHUuPF1 6tNnk2oKI+cucIdtd02gc7dp6+qaKEyeqxmSY9eULPqahwemFa1huglgE5KBKNtpkXpQnoKLqxwng ewBE/unMzDuLvde+h30VAXvA1zvU77C3MHdMME+91oWqrv0OPB9UvgpCrCjPEkcolqMwjfo9k6uVp kUnGE=; Received: from cpc102320-sgyl38-2-0-cust46.18-2.cable.virginm.net ([82.37.168.47] helo=debutante.sirena.org.uk) by heliosphere.sirena.org.uk with esmtpa (Exim 4.89) (envelope-from ) id 1gJdeZ-0008OD-Ay; Mon, 05 Nov 2018 12:06:47 +0000 Received: by debutante.sirena.org.uk (Postfix, from userid 1000) id 0E9EF1124D98; Mon, 5 Nov 2018 12:06:47 +0000 (GMT) From: Mark Brown To: Emil Renner Berthing Subject: Applied "spi: rockchip: use atomic_t state" to the spi tree In-Reply-To: <20181031105711.19575-5-esmil@mailme.dk> Message-Id: <20181105120647.0E9EF1124D98@debutante.sirena.org.uk> Date: Mon, 5 Nov 2018 12:06:47 +0000 (GMT) X-Bad-Reply: In-Reply-To but no 'Re:' in Subject. X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181105_070656_199095_EF1FD692 X-CRM114-Status: GOOD ( 18.72 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Addy Ke , Heiko Stuebner , linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, linux-rockchip@lists.infradead.org, Mark Brown , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The patch spi: rockchip: use atomic_t state has been applied to the spi tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark From fab3e4871f623c8f86e8a0e00749f1480ffa08db Mon Sep 17 00:00:00 2001 From: Emil Renner Berthing Date: Wed, 31 Oct 2018 11:57:01 +0100 Subject: [PATCH] spi: rockchip: use atomic_t state The state field is currently only used to make sure only the last of the tx and rx dma callbacks issue an spi_finalize_current_transfer. Rather than using a spinlock we can get away with just turning the state field into an atomic_t. Signed-off-by: Emil Renner Berthing Tested-by: Heiko Stuebner Signed-off-by: Mark Brown --- drivers/spi/spi-rockchip.c | 75 +++++++++++++------------------------- 1 file changed, 25 insertions(+), 50 deletions(-) diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c index 7fac4253075e..1c813797f963 100644 --- a/drivers/spi/spi-rockchip.c +++ b/drivers/spi/spi-rockchip.c @@ -142,8 +142,9 @@ #define RF_DMA_EN (1 << 0) #define TF_DMA_EN (1 << 1) -#define RXBUSY (1 << 0) -#define TXBUSY (1 << 1) +/* Driver state flags */ +#define RXDMA (1 << 0) +#define TXDMA (1 << 1) /* sclk_out: spi master internal logic in rk3x can support 50Mhz */ #define MAX_SCLK_OUT 50000000 @@ -169,6 +170,9 @@ struct rockchip_spi { struct clk *apb_pclk; void __iomem *regs; + + atomic_t state; + /*depth of the FIFO buffer */ u32 fifo_len; /* max bus freq supported */ @@ -187,10 +191,6 @@ struct rockchip_spi { void *rx; void *rx_end; - u32 state; - /* protect state */ - spinlock_t lock; - bool cs_asserted[ROCKCHIP_SPI_MAX_CS_NUM]; bool use_dma; @@ -302,28 +302,21 @@ static int rockchip_spi_prepare_message(struct spi_master *master, static void rockchip_spi_handle_err(struct spi_master *master, struct spi_message *msg) { - unsigned long flags; struct rockchip_spi *rs = spi_master_get_devdata(master); - spin_lock_irqsave(&rs->lock, flags); - /* * For DMA mode, we need terminate DMA channel and flush * fifo for the next transfer if DMA thansfer timeout. * handle_err() was called by core if transfer failed. * Maybe it is reasonable for error handling here. */ - if (rs->use_dma) { - if (rs->state & RXBUSY) { - dmaengine_terminate_async(rs->dma_rx.ch); - flush_fifo(rs); - } + if (atomic_read(&rs->state) & TXDMA) + dmaengine_terminate_async(rs->dma_tx.ch); - if (rs->state & TXBUSY) - dmaengine_terminate_async(rs->dma_tx.ch); + if (atomic_read(&rs->state) & RXDMA) { + dmaengine_terminate_async(rs->dma_rx.ch); + flush_fifo(rs); } - - spin_unlock_irqrestore(&rs->lock, flags); } static int rockchip_spi_unprepare_message(struct spi_master *master, @@ -398,48 +391,36 @@ static int rockchip_spi_pio_transfer(struct rockchip_spi *rs) static void rockchip_spi_dma_rxcb(void *data) { - unsigned long flags; struct rockchip_spi *rs = data; + int state = atomic_fetch_andnot(RXDMA, &rs->state); - spin_lock_irqsave(&rs->lock, flags); - - rs->state &= ~RXBUSY; - if (!(rs->state & TXBUSY)) { - spi_enable_chip(rs, false); - spi_finalize_current_transfer(rs->master); - } + if (state & TXDMA) + return; - spin_unlock_irqrestore(&rs->lock, flags); + spi_enable_chip(rs, false); + spi_finalize_current_transfer(rs->master); } static void rockchip_spi_dma_txcb(void *data) { - unsigned long flags; struct rockchip_spi *rs = data; + int state = atomic_fetch_andnot(TXDMA, &rs->state); + + if (state & RXDMA) + return; /* Wait until the FIFO data completely. */ wait_for_idle(rs); - spin_lock_irqsave(&rs->lock, flags); - - rs->state &= ~TXBUSY; - if (!(rs->state & RXBUSY)) { - spi_enable_chip(rs, false); - spi_finalize_current_transfer(rs->master); - } - - spin_unlock_irqrestore(&rs->lock, flags); + spi_enable_chip(rs, false); + spi_finalize_current_transfer(rs->master); } static int rockchip_spi_prepare_dma(struct rockchip_spi *rs) { - unsigned long flags; struct dma_async_tx_descriptor *rxdesc, *txdesc; - spin_lock_irqsave(&rs->lock, flags); - rs->state &= ~RXBUSY; - rs->state &= ~TXBUSY; - spin_unlock_irqrestore(&rs->lock, flags); + atomic_set(&rs->state, 0); rxdesc = NULL; if (rs->rx) { @@ -490,9 +471,7 @@ static int rockchip_spi_prepare_dma(struct rockchip_spi *rs) /* rx must be started before tx due to spi instinct */ if (rxdesc) { - spin_lock_irqsave(&rs->lock, flags); - rs->state |= RXBUSY; - spin_unlock_irqrestore(&rs->lock, flags); + atomic_or(RXDMA, &rs->state); dmaengine_submit(rxdesc); dma_async_issue_pending(rs->dma_rx.ch); } @@ -500,9 +479,7 @@ static int rockchip_spi_prepare_dma(struct rockchip_spi *rs) spi_enable_chip(rs, true); if (txdesc) { - spin_lock_irqsave(&rs->lock, flags); - rs->state |= TXBUSY; - spin_unlock_irqrestore(&rs->lock, flags); + atomic_or(TXDMA, &rs->state); dmaengine_submit(txdesc); dma_async_issue_pending(rs->dma_tx.ch); } @@ -716,8 +693,6 @@ static int rockchip_spi_probe(struct platform_device *pdev) goto err_disable_spiclk; } - spin_lock_init(&rs->lock); - pm_runtime_set_active(&pdev->dev); pm_runtime_enable(&pdev->dev);