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bh=SYvsDZFatZNo8KTo2brjgveRTySLcBTtFJwHL/yY9k0=; b=JgTq2AeNy2vcoGVtXwGSuBwH2b9M6mnUKwDDhskNdL4TkwUQgaU5Yghw4aZ09W08F7 WrnurvUKDgkSkI+3m0nQYwtkPewnkp7Z2xpDrOXxIYB5XFWVEeD1sEXWbRK4J7QixP4z 3tct38REvZVyH+q+Bk64exNHH8z10u/RBvNR0NXULJmzK0YCCK2CDK/vyuviyzwYig3z vbm4GbdR1+Pd4fvHm6Uh4EqomZ2t0xJx8SPCAGzkhvEoSGTTv2HIQ6Nq6yjUxACeJqw8 r6krbiHlMKZWYs0zeofZAtA1b5SAZzpvADN3tfeciqgCbHdyr229D6+1j6OsDQC+WjZ/ eM0g== X-Gm-Message-State: AGRZ1gJNYksHiHKusjAeEq2bJKw456kLjwrI/GFINfOxRONTq2QPuE6B SKiDfw2Wm4NBGcdySH+iNIVM+g== X-Google-Smtp-Source: AJdET5dhef3zHWl6a/7x7lhsAttAAaHHpP3FIb9XZmOXPQBl1Ydz+eFHawtisZ7Dno7t6QaYZeKkng== X-Received: by 2002:a63:af18:: with SMTP id w24mr4397635pge.385.1542107973054; Tue, 13 Nov 2018 03:19:33 -0800 (PST) Received: from localhost.localdomain ([2401:4900:3670:3f11:bc71:2ef7:4a39:e260]) by smtp.gmail.com with ESMTPSA id 27-v6sm28531377pfm.36.2018.11.13.03.19.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 13 Nov 2018 03:19:32 -0800 (PST) From: Jagan Teki To: Maxime Ripard , Chen-Yu Tsai , Icenowy Zheng , Jernej Skrabec , Vasily Khoruzhick , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , David Airlie , dri-devel@lists.freedesktop.org, Michael Turquette , Stephen Boyd , linux-clk@vger.kernel.org, Michael Trimarchi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, linux-amarula@amarulasolutions.com Subject: [PATCH v4 26/26] arm64: dts: allwinner: a64-amarula-relic: Enable Techstar TS8550B MIPI-DSI panel Date: Tue, 13 Nov 2018 16:46:33 +0530 Message-Id: <20181113111633.20189-27-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181113111633.20189-1-jagan@amarulasolutions.com> References: <20181113111633.20189-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181113_031944_390413_92FDEB9E X-CRM114-Status: GOOD ( 15.34 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jagan Teki Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Amarula A64-Relic board by default bound with Techstar TS8550B MIPI-DSI panel, add support for it. DSI panel connected via board DSI port with, - DC1SW as AVDD supply - DCDC2 as DVDD supply - DCDC1 as VCC-DSI supply - PD24 gpio for reset pin - PD23 gpio for backlight enable pin Signed-off-by: Jagan Teki --- .../allwinner/sun50i-a64-amarula-relic.dts | 46 +++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts index 6cb2b7f0c817..ecc0d8094815 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts @@ -9,6 +9,7 @@ #include "sun50i-a64.dtsi" #include +#include / { model = "Amarula A64-Relic"; @@ -18,6 +19,14 @@ serial0 = &uart0; }; + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; + brightness-levels = <1 2 4 8 16 32 64 128 512>; + default-brightness-level = <2>; + enable-gpios = <&pio 3 23 GPIO_ACTIVE_HIGH>; /* LCD-BL-EN: PD23 */ + }; + chosen { stdout-path = "serial0:115200n8"; }; @@ -30,6 +39,28 @@ }; }; +&de { + status = "okay"; +}; + +&dphy { + status = "okay"; +}; + +&dsi { + vcc-dsi-supply = <®_dldo1>; + status = "okay"; + + panel@0 { + compatible = "techstar,ts8550b"; + reg = <0>; + avdd-supply = <®_dc1sw>; + dvdd-supply = <®_dldo2>; + reset-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* LCD-RST: PD24 */ + backlight = <&backlight>; + }; +}; + &ehci0 { status = "okay"; }; @@ -72,6 +103,12 @@ status = "okay"; }; +&pwm { + pinctrl-names = "default"; + pinctrl-0 = <&pwm_pin>; + status = "okay"; +}; + &r_rsb { status = "okay"; @@ -107,6 +144,15 @@ regulator-name = "vcc-pll-avcc"; }; +®_dc1sw { + /* + * This regulator also indirectly drives the PD pingroup GPIOs, + * which also controls the power LED. + */ + regulator-always-on; + regulator-name = "vcc-phy"; +}; + ®_dcdc1 { regulator-always-on; regulator-min-microvolt = <3300000>;