From patchwork Wed Dec 5 09:24:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Kocialkowski X-Patchwork-Id: 10713447 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 73C301731 for ; Wed, 5 Dec 2018 09:26:08 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 648352C988 for ; Wed, 5 Dec 2018 09:26:08 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 58B352CCEE; Wed, 5 Dec 2018 09:26:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id DF3022C9AF for ; Wed, 5 Dec 2018 09:26:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=dcVx71h3cl8qOvlTWXspRjUXvLsSm9paXZRAzEky30g=; b=peDScZLcCFff3e F6AkBBt4v2TJukK76RJUkUo4jIU6c8sWWqyAa0EhF15Zxwf1EVfJVixVh3rI/L5wa97JNnUrChZ5g ZcLxK8um0/8OhEluA+UrqqNg+ehQ1euD4e3xOo4ZqS88B7pPeCuh8fiiYFIRtqjIOiPb5XiVyG7sv ZiTLUsfQXFBkwFboVE6NFNqoFiaOQZ6VTtH3B6oi09SadSFWYPPA5JmF+kwQmHw0oY6zPgaI9QbwJ 2swkuiljmpWn0P/araH98yxqIr2iL2duPsx6M2yoVHtxIGjNquZ/JZZTMQBXXza8p7on9lXEIe45s k+guJ2wVjBMVBslsAy/g==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gUTRU-0006tP-KP; Wed, 05 Dec 2018 09:26:04 +0000 Received: from mail.bootlin.com ([62.4.15.54]) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gUTQr-0006HK-4O for linux-arm-kernel@lists.infradead.org; Wed, 05 Dec 2018 09:25:28 +0000 Received: by mail.bootlin.com (Postfix, from userid 110) id CC9D020D23; Wed, 5 Dec 2018 10:25:14 +0100 (CET) Received: from localhost.localdomain (aaubervilliers-681-1-79-44.w90-88.abo.wanadoo.fr [90.88.21.44]) by mail.bootlin.com (Postfix) with ESMTPSA id 6A28220726; Wed, 5 Dec 2018 10:25:04 +0100 (CET) From: Paul Kocialkowski To: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devel@driverdev.osuosl.org Subject: [PATCH v2 04/15] soc: sunxi: sram: Enable EMAC clock access for H3 variant Date: Wed, 5 Dec 2018 10:24:33 +0100 Message-Id: <20181205092444.29497-5-paul.kocialkowski@bootlin.com> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181205092444.29497-1-paul.kocialkowski@bootlin.com> References: <20181205092444.29497-1-paul.kocialkowski@bootlin.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181205_012525_370512_E3CCAD92 X-CRM114-Status: GOOD ( 13.56 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Hans Verkuil , Sakari Ailus , Maxime Ripard , linux-sunxi@googlegroups.com, Paul Kocialkowski , Chen-Yu Tsai , Rob Herring , Thomas Petazzoni , Mauro Carvalho Chehab Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Just like the A64 and H5, the H3 SoC uses the system control block to enable the EMAC clock. Add a variant structure definition for the H3 and use it over the A10 one. This will allow using the H3-specific binding for the syscon node attached to the EMAC instead of the generic syscon binding. Signed-off-by: Paul Kocialkowski Reviewed-by: Chen-Yu Tsai --- drivers/soc/sunxi/sunxi_sram.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/soc/sunxi/sunxi_sram.c b/drivers/soc/sunxi/sunxi_sram.c index 71e3ee4a3f19..fd81a3c0db45 100644 --- a/drivers/soc/sunxi/sunxi_sram.c +++ b/drivers/soc/sunxi/sunxi_sram.c @@ -290,6 +290,10 @@ static const struct sunxi_sramc_variant sun4i_a10_sramc_variant = { /* Nothing special */ }; +static const struct sunxi_sramc_variant sun8i_h3_sramc_variant = { + .has_emac_clock = true, +}; + static const struct sunxi_sramc_variant sun50i_a64_sramc_variant = { .has_emac_clock = true, }; @@ -369,7 +373,7 @@ static const struct of_device_id sunxi_sram_dt_match[] = { }, { .compatible = "allwinner,sun8i-h3-system-control", - .data = &sun4i_a10_sramc_variant, + .data = &sun8i_h3_sramc_variant, }, { .compatible = "allwinner,sun50i-a64-sram-controller",