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[92.154.90.120]) by smtp.gmail.com with ESMTPSA id y34sm1525233wrd.68.2018.12.06.07.59.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 06 Dec 2018 07:59:45 -0800 (PST) From: Ard Biesheuvel To: linux-kernel@vger.kernel.org Subject: [PATCH 4/5] arm64/assembler: use callback to 3-way alt-patch DC CVAP instructions Date: Thu, 6 Dec 2018 16:57:38 +0100 Message-Id: <20181206155739.20229-5-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181206155739.20229-1-ard.biesheuvel@linaro.org> References: <20181206155739.20229-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181206_075954_673626_F8DFA998 X-CRM114-Status: GOOD ( 12.20 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ard Biesheuvel , Marc Zyngier , Catalin Marinas , Suzuki Poulose , Will Deacon , Robin Murphy , Dave Martin , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Use the enhanced alternative_cb implementation to reimplement the code patching logic for DC CVAP instructions so that we don't fall back to DV CVAC instructions on systems that require those to be upgraded to DC CIVAC to work around silicon errata. At the same time, we don't want to use DV CIVAC needlessly, since doing so may adversely affect performance. Signed-off-by: Ard Biesheuvel --- arch/arm64/include/asm/assembler.h | 9 +++++---- arch/arm64/kernel/cpu_errata.c | 14 ++++++++++++++ 2 files changed, 19 insertions(+), 4 deletions(-) diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h index 6142402c2eb4..09c5a5452f60 100644 --- a/arch/arm64/include/asm/assembler.h +++ b/arch/arm64/include/asm/assembler.h @@ -390,11 +390,12 @@ alternative_else dc civac, \kaddr alternative_endif .elseif (\op == cvap) -alternative_if ARM64_HAS_DCPOP - sys 3, c7, c12, 1, \kaddr // dc cvap -alternative_else +alternative_cb arm64_handle_dc_cvap + dc civac, \kaddr +alternative_cb_alt + sys 3, c7, c12, 1, \kaddr // dc cvap dc cvac, \kaddr -alternative_endif +alternative_cb_end .else dc \op, \kaddr .endif diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c index c5489b4612c5..a63e362da307 100644 --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -755,3 +755,17 @@ const struct arm64_cpu_capabilities arm64_errata[] = { { } }; + +asmlinkage void __init arm64_handle_dc_cvap(struct alt_instr *alt, + __le32 *origptr, __le32 *updptr, + int nr_inst, int nr_alts) +{ + struct alt_instr_cb *alt_insn = offset_to_ptr(&alt->alt_offset); + + BUG_ON(nr_inst != 1 || nr_alts != 2); + + if (cpus_have_cap(ARM64_HAS_DCPOP)) + updptr[0] = alt_insn->insn[0]; + else if (!cpus_have_cap(ARM64_WORKAROUND_CLEAN_CACHE)) + updptr[0] = alt_insn->insn[1]; +}