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[92.154.90.120]) by smtp.gmail.com with ESMTPSA id y34sm1525233wrd.68.2018.12.06.07.59.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 06 Dec 2018 07:59:47 -0800 (PST) From: Ard Biesheuvel To: linux-kernel@vger.kernel.org Subject: [PATCH 5/5] arm64/mm: use string comparisons in dcache_by_line_op Date: Thu, 6 Dec 2018 16:57:39 +0100 Message-Id: <20181206155739.20229-6-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181206155739.20229-1-ard.biesheuvel@linaro.org> References: <20181206155739.20229-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181206_075954_669454_8552ECDD X-CRM114-Status: GOOD ( 13.13 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ard Biesheuvel , Marc Zyngier , Catalin Marinas , Suzuki Poulose , Will Deacon , Robin Murphy , Dave Martin , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The GAS directives that are currently being used in dcache_by_line_op rely on assembler behavior that is not documented, and probably not guaranteed to produce the correct behavior going forward. Currently, we end up with some undefined symbols in cache.o: $ nm arch/arm64/mm/cache.o ... U civac ... U cvac U cvap U cvau This is due to the fact that the comparisons used to select the operation type in the dcache_by_line_op macro are comparing symbols not strings, and even though it seems that GAS is doing the right thing here (undefined symbols by the same name are equal to each other), it seems unwise to rely on this. So let's switch to conditional directives that are documented as operating on strings. Since these cannot be combined like ordinary arithmetic expressions, invert the comparison logic. Signed-off-by: Ard Biesheuvel --- arch/arm64/include/asm/assembler.h | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h index 09c5a5452f60..df3043e76e6a 100644 --- a/arch/arm64/include/asm/assembler.h +++ b/arch/arm64/include/asm/assembler.h @@ -383,21 +383,23 @@ alternative_endif sub \tmp2, \tmp1, #1 bic \kaddr, \kaddr, \tmp2 9998: - .if (\op == cvau || \op == cvac) + .ifnc \op, civac + .ifnc \op, cvap alternative_if_not ARM64_WORKAROUND_CLEAN_CACHE dc \op, \kaddr alternative_else dc civac, \kaddr alternative_endif - .elseif (\op == cvap) + .else alternative_cb arm64_handle_dc_cvap dc civac, \kaddr alternative_cb_alt sys 3, c7, c12, 1, \kaddr // dc cvap dc cvac, \kaddr alternative_cb_end + .endif .else - dc \op, \kaddr + dc civac, \kaddr .endif add \kaddr, \kaddr, \tmp1 cmp \kaddr, \size