| Message ID | 20181219154017.6104-1-harald@ccbib.org (mailing list archive) |
|---|---|
| State | Mainlined, archived |
| Commit | 34a97fcc71c26f492682e839a812e6e44da48cf7 |
| Headers | show |
| Series | arm64: dts: allwinner: a64: Add PMU node | expand |
On Wed, Dec 19, 2018 at 03:40:17PM +0000, Harald Geyer wrote: > This is necessary to use 'perf' for cache profiling etc. > Tested on Teres I Laptop. > > Signed-off-by: Harald Geyer <harald@ccbib.org> QUeued for 4.22, thanks! Maxime
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index 837a03dee875..bf9b719481c4 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -142,6 +142,15 @@ clock-output-names = "ext-osc32k"; }; + pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + }; + psci { compatible = "arm,psci-0.2"; method = "smc";
This is necessary to use 'perf' for cache profiling etc. Tested on Teres I Laptop. Signed-off-by: Harald Geyer <harald@ccbib.org> --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+)