diff mbox series

[v2] arm64: dts: renesas: r8a77990: ebisu: Enable HS400 of SDHI3

Message ID 20190118122536.20000-1-horms+renesas@verge.net.au (mailing list archive)
State Mainlined, archived
Commit 3e279a1d44d73aea9ce428ae68e76bf85117031a
Headers show
Series [v2] arm64: dts: renesas: r8a77990: ebisu: Enable HS400 of SDHI3 | expand

Commit Message

Simon Horman Jan. 18, 2019, 12:25 p.m. UTC 
Enable HS400 of SDHI3 using the corresponding DT property.
No further changes are required.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
Tested on top of renesas-devel-20190110-v5.0-rc1
---
 arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts | 1 +
 1 file changed, 1 insertion(+)

Comments

Geert Uytterhoeven Jan. 18, 2019, 1:31 p.m. UTC | #1 
Hi Simon,

On Fri, Jan 18, 2019 at 1:25 PM Simon Horman <horms+renesas@verge.net.au> wrote:
> Enable HS400 of SDHI3 using the corresponding DT property.
> No further changes are required.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>

Using "hdparm -tT /dev/mmcblk0"

HS200:

 Timing cached reads:   694 MB in  2.00 seconds = 346.60 MB/sec
 Timing buffered disk reads: 434 MB in  3.00 seconds = 144.56 MB/sec

HS400:

 Timing cached reads:   696 MB in  2.00 seconds = 348.20 MB/sec
 Timing buffered disk reads: 446 MB in  3.00 seconds = 148.65 MB/sec

No real difference.

Note that "dd" gives me very fluctuating results (all for HS400):

root@ebisu:~# dd if=/dev/mmcblk0 of=/dev/null bs=1M count=128 iflag=direct
128+0 records in
128+0 records out
134217728 bytes (134 MB, 128 MiB) copied, 3.20103 s, 41.9 MB/s
root@ebisu:~# dd if=/dev/mmcblk0 of=/dev/null bs=1M count=128 iflag=direct
128+0 records in
128+0 records out
134217728 bytes (134 MB, 128 MiB) copied, 1.15324 s, 116 MB/s
128+0 records in
128+0 records out
134217728 bytes (134 MB, 128 MiB) copied, 1.82701 s, 73.5 MB/s

Gr{oetje,eeting}s,

                        Geert
Wolfram Sang Jan. 19, 2019, 10:22 p.m. UTC | #2 
On Fri, Jan 18, 2019 at 01:25:36PM +0100, Simon Horman wrote:
> Enable HS400 of SDHI3 using the corresponding DT property.
> No further changes are required.
> 
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

We might need to find an explanation for the performance numbers,
nontheless this patch is correct.
Simon Horman Jan. 21, 2019, 4:57 p.m. UTC | #3 
On Sat, Jan 19, 2019 at 11:22:20PM +0100, Wolfram Sang wrote:
> On Fri, Jan 18, 2019 at 01:25:36PM +0100, Simon Horman wrote:
> > Enable HS400 of SDHI3 using the corresponding DT property.
> > No further changes are required.
> > 
> > Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> 
> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
> 
> We might need to find an explanation for the performance numbers,
> nontheless this patch is correct.

Thanks, I think we can queue this up for mainline and I have done so for
v5.1.
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
index 89383aa35d65..144c0820cf60 100644
--- a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
@@ -695,6 +695,7 @@ 
 	vmmc-supply = <&reg_3p3v>;
 	vqmmc-supply = <&reg_1p8v>;
 	mmc-hs200-1_8v;
+	mmc-hs400-1_8v;
 	bus-width = <8>;
 	non-removable;
 	status = "okay";