diff mbox series

ARM: dts: BCM5301X: Add basic DT for Phicomm K3

Message ID 20190120223327.14999-1-zajec5@gmail.com (mailing list archive)
State Mainlined, archived
Commit 40a17923367118e32e5e413a952736dd83635b32
Headers show
Series ARM: dts: BCM5301X: Add basic DT for Phicomm K3 | expand

Commit Message

Rafał Miłecki Jan. 20, 2019, 10:33 p.m. UTC 
From: Hao Dong <halbertdong@gmail.com>

This router has BCM4709C0 SoC, 128 MiB NAND flash (MX30LF1G18AC-TI),
512 MiB memory and 3 x LAN and 1 x WAN ports. WiFi chips are
BCM4366C0 x 2. The router has a small LCD and 3 capactive keys driven by
a PIC microcontroller, which is in turn wired to UART1 of main board.

Signed-off-by: Hao Dong <halbertdong@gmail.com>
[rmilecki: drop chosen { }, fix whitespaces, update commit message]
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
I've taken OpenWrt submitted DTS and updated it to fit upstream
standards:
1) Dropped chosen { } with duplicated console info
2) Fixed whitespaces
3) Dropped OpenWrt specific info from the commit message:
   * LCD software package
   * openwrt.org & 4366c0 firmware
---
 arch/arm/boot/dts/Makefile                |  1 +
 arch/arm/boot/dts/bcm47094-phicomm-k3.dts | 71 +++++++++++++++++++++++
 2 files changed, 72 insertions(+)
 create mode 100644 arch/arm/boot/dts/bcm47094-phicomm-k3.dts

Comments

Florian Fainelli Feb. 1, 2019, 5:06 a.m. UTC | #1 
On Sun, 20 Jan 2019 23:33:27 +0100, Rafał Miłecki <zajec5@gmail.com> wrote:
> From: Hao Dong <halbertdong@gmail.com>
> 
> This router has BCM4709C0 SoC, 128 MiB NAND flash (MX30LF1G18AC-TI),
> 512 MiB memory and 3 x LAN and 1 x WAN ports. WiFi chips are
> BCM4366C0 x 2. The router has a small LCD and 3 capactive keys driven by
> a PIC microcontroller, which is in turn wired to UART1 of main board.
> 
> Signed-off-by: Hao Dong <halbertdong@gmail.com>
> [rmilecki: drop chosen { }, fix whitespaces, update commit message]
> Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
> ---

Applied to devicetree/next, thanks!
--
Florian
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index bd40148a15b2..bbc0f4527c39 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -115,6 +115,7 @@  dtb-$(CONFIG_ARCH_BCM_5301X) += \
 	bcm47094-luxul-xwr-3100.dtb \
 	bcm47094-luxul-xwr-3150-v1.dtb \
 	bcm47094-netgear-r8500.dtb \
+	bcm47094-phicomm-k3.dtb \
 	bcm94708.dtb \
 	bcm94709.dtb \
 	bcm953012er.dtb \
diff --git a/arch/arm/boot/dts/bcm47094-phicomm-k3.dts b/arch/arm/boot/dts/bcm47094-phicomm-k3.dts
new file mode 100644
index 000000000000..ec09c0426d16
--- /dev/null
+++ b/arch/arm/boot/dts/bcm47094-phicomm-k3.dts
@@ -0,0 +1,71 @@ 
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright (C) 2017 Hamster Tian <haotia@gmail.com>
+ * Copyright (C) 2019 Hao Dong <halbertdong@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "bcm47094.dtsi"
+#include "bcm5301x-nand-cs0-bch4.dtsi"
+
+/ {
+	compatible = "phicomm,k3", "brcm,bcm47094", "brcm,bcm4708";
+	model = "Phicomm K3";
+
+	memory {
+		reg = <0x00000000 0x08000000
+		       0x88000000 0x18000000>;
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		restart {
+			label = "Reset";
+			linux,code = <KEY_RESTART>;
+			gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&uart1 {
+	status = "okay";
+};
+
+&usb3_phy {
+	status = "okay";
+};
+
+&nandcs {
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		partition@0 {
+			label = "boot";
+			reg = <0x0000000 0x0080000>;
+			read-only;
+		};
+
+		partition@80000 {
+			label = "nvram";
+			reg = <0x0080000 0x0100000>;
+		};
+
+		partition@180000{
+			label = "phicomm";
+			reg = <0x0180000 0x0280000>;
+			read-only;
+		};
+
+		partition@400000 {
+			label = "firmware";
+			reg = <0x0400000 0x7C00000>;
+			compatible = "brcm,trx";
+		};
+	};
+};