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[3/3] ARM: dts: sun5i: A10s: Add SPI1_CS1 PG13 pin

Message ID 20190123094334.11030-4-josef@lusticky.cz (mailing list archive)
State New, archived
Headers show
Series Add SPI pinctrl nodes to sun5i SoCs. | expand

Commit Message

Josef Luštický Jan. 23, 2019, 9:43 a.m. UTC 
Add a separate pinctrl node for the SPI1_CS1 pin on the A10s PG bank.

Signed-off-by: Josef Lusticky <josef@lusticky.cz>
---
 arch/arm/boot/dts/sun5i-a10s.dtsi | 5 +++++
 1 file changed, 5 insertions(+)
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Patch

diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
index 09c486b608b2..156fefc045ac 100644
--- a/arch/arm/boot/dts/sun5i-a10s.dtsi
+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
@@ -153,6 +153,11 @@ 
 		drive-strength = <30>;
 	};
 
+	spi1_cs1_pg_pin: spi1-cs1-pg-pin {
+		pins = "PG13";
+		function = "spi2";
+	};
+
 	spi2_pb_pins: spi2-pb-pins {
 		pins = "PB12", "PB13", "PB14";
 		function = "spi2";