From patchwork Tue Jan 29 20:08:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Goldschmidt X-Patchwork-Id: 10787207 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AB43C1399 for ; Tue, 29 Jan 2019 20:09:23 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9A2932D2BB for ; Tue, 29 Jan 2019 20:09:23 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8E3EB2D2D6; Tue, 29 Jan 2019 20:09:23 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,DKIM_VALID,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B9F0C2D2BB for ; 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bh=P7uVknH6a2Lm+ESxiJyN8q2dm02UOXfATTairwfK400=; b=kYsGUceOV+k8ocwnR1bw/tQtnWAldqm9tVmBmzpNHVqBADVy9Jqk7PldvsYOaYBjlm cvLjL9BQZkOEna/G3cqh/55zaiDNE3/KNNAd+BoeCVeyDeTtPXk27D0oTsme6oKFSJ37 QbX0fH/0jeC4lpLtSlz9IdysRlDIewU2pcBrxmI736m+OhDqM7cYpJ+MhyzgJp891KP5 7BQz9UtH8GEMbozE40KJH9uLl1catBh8hAr72RBymmp0kSuZz2B9DYbYAhMYwvTVey3P KaJwSIwnmWTa2g5xjMpzHS26u6H3o8c/zTFojHDsp5Z6NudQ+/vqpC2SgT28YymFivWY ZL+Q== X-Gm-Message-State: AJcUukexSLDPTpd2tjNaYLxXJMDxy8iFZo910R58Gy0zbI/YvAKJnCFL eFoKL9iLbFCIFLPSszqMobU= X-Google-Smtp-Source: ALg8bN5DuFtprYmvcsaJ7ebhyaOqIHffPOA+BEFzkHnf4qwnam+Hcb21/mFU85z/wTkdBjSqVD2iwA== X-Received: by 2002:a1c:96ce:: with SMTP id y197mr23364527wmd.36.1548792554022; Tue, 29 Jan 2019 12:09:14 -0800 (PST) Received: from ubuntu.home ([2a02:8071:6a3:700:8c22:ee0c:efc8:ed86]) by smtp.gmail.com with ESMTPSA id w10sm4279020wmb.1.2019.01.29.12.09.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 29 Jan 2019 12:09:13 -0800 (PST) From: Simon Goldschmidt X-Google-Original-From: Simon Goldschmidt To: Dinh Nguyen Subject: [PATCH] ARM: socfpga: fix base address of SDR controller Date: Tue, 29 Jan 2019 21:08:58 +0100 Message-Id: <20190129200858.19773-1-goldsimon@gmx.de> X-Mailer: git-send-email 2.17.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190129_120917_418762_5A5C813F X-CRM114-Status: GOOD ( 16.64 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Alan Tull , linux-fpga@vger.kernel.org, Simon Goldschmidt , linux-kernel@vger.kernel.org, Russell King , Rob Herring , Moritz Fischer , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Simon Goldschmidt The documentation for socfpga gen5 says the base address of the sdram controller is 0xffc20000, while the current devicetree says it is at 0xffc25000. While this is not a problem for Linux, as it only accesses the registers above 0xffc25000, it *is* a problem for U-Boot because the lower registers are used during DDR calibration (up to now, the U-Boot driver does not use the dts address, but that should change). To keep Linux and U-Boot devicetrees in sync, this patch changes the base address to 0xffc20000 and adapts the 2 files where it is currently used. This patch changes the dts and 2 drivers with one commit to prevent breaking the code if dts change and driver change would be split. Signed-off-by: Simon Goldschmidt --- arch/arm/boot/dts/socfpga.dtsi | 4 ++-- arch/arm/mach-socfpga/self-refresh.S | 4 ++-- drivers/fpga/altera-fpga2sdram.c | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index f365003f0..8f6c1a5d6 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -788,9 +788,9 @@ reg = <0xfffec000 0x100>; }; - sdr: sdr@ffc25000 { + sdr: sdr@ffc20000 { compatible = "altr,sdr-ctl", "syscon"; - reg = <0xffc25000 0x1000>; + reg = <0xffc20000 0x6000>; }; sdramedac { diff --git a/arch/arm/mach-socfpga/self-refresh.S b/arch/arm/mach-socfpga/self-refresh.S index f2d7f883e..bd7759357 100644 --- a/arch/arm/mach-socfpga/self-refresh.S +++ b/arch/arm/mach-socfpga/self-refresh.S @@ -19,8 +19,8 @@ #define MAX_LOOP_COUNT 1000 /* Register offset */ -#define SDR_CTRLGRP_LOWPWREQ_ADDR 0x54 -#define SDR_CTRLGRP_LOWPWRACK_ADDR 0x58 +#define SDR_CTRLGRP_LOWPWREQ_ADDR 0x5054 +#define SDR_CTRLGRP_LOWPWRACK_ADDR 0x5058 /* Bitfield positions */ #define SELFRSHREQ_POS 3 diff --git a/drivers/fpga/altera-fpga2sdram.c b/drivers/fpga/altera-fpga2sdram.c index a78e49c63..30767c254 100644 --- a/drivers/fpga/altera-fpga2sdram.c +++ b/drivers/fpga/altera-fpga2sdram.c @@ -30,7 +30,7 @@ #include #include -#define ALT_SDR_CTL_FPGAPORTRST_OFST 0x80 +#define ALT_SDR_CTL_FPGAPORTRST_OFST 0x5080 #define ALT_SDR_CTL_FPGAPORTRST_PORTRSTN_MSK 0x00003fff #define ALT_SDR_CTL_FPGAPORTRST_RD_SHIFT 0 #define ALT_SDR_CTL_FPGAPORTRST_WR_SHIFT 4