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Wed, 30 Jan 2019 11:34:29 +0000 From: Pankaj Bansal To: Leo Li Subject: [PATCH v2 1/2] dt-bindings: soc: fsl: Document Qixis FPGA usage Thread-Topic: [PATCH v2 1/2] dt-bindings: soc: fsl: Document Qixis FPGA usage Thread-Index: AQHUuI/CnulVew1FE06wfvNuXyQiJw== Date: Wed, 30 Jan 2019 11:34:28 +0000 Message-ID: <20190130165916.8628-2-pankaj.bansal@nxp.com> References: <20190130165916.8628-1-pankaj.bansal@nxp.com> In-Reply-To: <20190130165916.8628-1-pankaj.bansal@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: BM1PR01CA0111.INDPRD01.PROD.OUTLOOK.COM (2603:1096:b00::27) To VI1PR0401MB2496.eurprd04.prod.outlook.com (2603:10a6:800:56::10) authentication-results: spf=none (sender IP is ) smtp.mailfrom=pankaj.bansal@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.17.1 x-originating-ip: [92.120.1.69] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; VI1PR0401MB2509; 6:UW3PqyycvmJlWgyLEfEG7Yp2sb2ozim8pR+jArH4s7eG4u8OhxMxVVw/QS9h0Wmg8LWSwmn31QZRXvFFkAcFXUFHOVd8L2Tk3W1ZDXAd1HXKzkaLLZEBMaVV7PPmU+bpO1yBoZrRsy7AcmvrTAZzENhdWNKgXforWecBdCyVcnHqVulAe/T95pYfQRt7gvbz2+WkXFaKXPjMUrhdtLxHULoNZ+4Tcn/IJc+/cWVFEdBSBJm1Q79jsEC8K+zVLOjd/bMAKRBLNLaO+YCuNn3gPyCx8XHhV2OcpzgP4omvUkh8KNx7biyO74mpDs7IZoFCXbI9/OOa4/gFuepPfun5auVivbTCdEuKlkzexw2R6fobQ5YE5MKSc8GM6+ZoorLOnJdDuDbNnvr2y6GpTSmSUZdnXOWbIvlc69nMKBKlPgfBo657ADFXjXi0iPGV286hrbUyKg+w3gsmNgy5tpkPfA==; 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DIR:OUT; SFP:1101; SCL:1; SRVR:VI1PR0401MB2509; H:VI1PR0401MB2496.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: qCWzcqQhbmYoQkVVuxSXVrCt+kYlCSUVq2tcpGJdQ8A4VoK0Nbm2Fk0/AvJXp/Sn5vQYTYZVOFiLxZyOTekkXcBIeIg1TvxghFTF+rL2dRB1aEfTvXyWy3dtB7TYFJ3Ndtd5ew9sXNdgmyjjBR/9FKK/m1bWk//iHhoydoqWHhbJCBJkIfZt2bRqmfCUK/zgosBJudtEHWOvCnZOUZhii6k5O/7nVg7Tq4TW06g985+XMkfDWasPOcaLOZP0O6s/Avk0WCjQPcYfq0udud3iTkDLuByib8tl8XJ4QeT2iJ8B9g2mLjK6gjxspusMMdB+3DEKDVafK6gjXIwTYsPr6YLJpKmJNfaXw0/B6WmfjOygQw9Jh/aJLj0MUIwEpphWs3EALKVp8XcBo7CLIqPCNUcwt4dRwayTLG9f+FbVdO4= Content-ID: MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 3aa793cd-d0b6-4bb4-ee5b-08d686a6e52a X-MS-Exchange-CrossTenant-originalarrivaltime: 30 Jan 2019 11:34:27.7774 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR0401MB2509 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190130_033440_110625_C7F23C4A X-CRM114-Status: GOOD ( 11.57 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Pankaj Bansal , "linuxppc-dev@lists.ozlabs.org" , "linux-arm-kernel@lists.infradead.org" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP an FPGA-based system controller, called “Qixis”, which manages several critical system features, including: • Reset sequencing • Power supply configuration • Board configuration • hardware configuration The qixis registers are accessible over one or more system-specific interfaces, typically I2C, JTAG or an embedded processor. Signed-off-by: Pankaj Bansal --- Notes: V2: - No change .../bindings/soc/fsl/qixis_ctrl.txt | 33 ++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/Documentation/devicetree/bindings/soc/fsl/qixis_ctrl.txt b/Documentation/devicetree/bindings/soc/fsl/qixis_ctrl.txt new file mode 100644 index 000000000000..bc2950cab71d --- /dev/null +++ b/Documentation/devicetree/bindings/soc/fsl/qixis_ctrl.txt @@ -0,0 +1,33 @@ +* QIXIS FPGA block + +an FPGA-based system controller, called “Qixis”, which +manages several critical system features, including: +• Configuration switch monitoring +• Power on/off sequencing +• Reset sequencing +• Power supply configuration +• Board configuration +• hardware configuration +• Background power data collection (DCM) +• Fault monitoring +• RCW bypass SRAM (replace flash RCW with internal RCW) (NOR only) +• Dedicated functional validation blocks (POSt/IRS, triggered event, and so on) +• I2C master for remote board control even with no DUT available + +The qixis registers are accessible over one or more system-specific interfaces, +typically I2C, JTAG or an embedded processor. + +Required properties: + + - compatible : string, must contain "fsl,fpga-qixis-i2c" + - reg : i2c address of the qixis device. + +Examples: + /* The FPGA node */ + fpga@66 { + compatible = "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c"; + reg = <0x66>; + #address-cells = <1>; + #size-cells = <0>; + } +