@@ -1318,24 +1318,43 @@
<&dfll>;
clock-names = "cpu_g", "pll_x", "pll_p", "dfll";
clock-latency = <300000>;
+ cpu-idle-states = <&C7>;
};
cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a57";
reg = <1>;
+ cpu-idle-states = <&C7>;
};
cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a57";
reg = <2>;
+ cpu-idle-states = <&C7>;
};
cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a57";
reg = <3>;
+ cpu-idle-states = <&C7>;
+ };
+
+ idle-states {
+ entry-method = "psci";
+
+ C7: c7 {
+ compatible = "arm,idle-state";
+ arm,psci-suspend-param = <0x40000007>;
+ entry-latency-us = <250>;
+ exit-latency-us = <100>;
+ min-residency-us = <1000>;
+ wakeup-latency-us = <130>;
+ idle-state-name = "c7-cpu-powergated";
+ status = "disabled";
+ };
};
};
Add idle states properties for generic ARM CPU idle driver. This includes a C7 state which is the power down state of CPU cores. Signed-off-by: Joseph Lo <josephl@nvidia.com> --- v4: * no change v3: * no change v2: * add entry-latency-us and exit-latency-us properties Note: This dt patch depends on the DT changes in below series. http://patchwork.ozlabs.org/project/linux-tegra/list/?series=84380 --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+)