Message ID | 20190205001721.18639-2-tpiepho@impinj.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Workaround for IMX7d PCI-e PLL lock failure | expand |
Am Dienstag, den 05.02.2019, 00:17 +0000 schrieb Trent Piepho: > There is a separate PHY device with its own registers on imx7d. It's > currently unused, but a PCIe erratum on imx7d will require it for the > workaround. > > Signed-off-by: Trent Piepho <tpiepho@impinj.com> I'm generally fine with this, but really want to see an Ack from the DT folks (CC'ed) on this. Acked-by: Lucas Stach <l.stach@pengutronix.de> Regards, Lucas > --- > Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > index d514c1f2365f..f4933c8951bc 100644 > --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > @@ -53,6 +53,7 @@ Additional required properties for imx7d-pcie: > > - "pciephy" > > - "apps" > > - "turnoff" > +- fsl,imx7d-pcie-phy: A phandle to an fsl,imx7d-pcie-phy node. > > Example: > > @@ -79,3 +80,13 @@ Example: > > clocks = <&clks 144>, <&clks 206>, <&clks 189>; > > clock-names = "pcie", "pcie_bus", "pcie_phy"; > > }; > + > +* Freescale i.MX7d PCIe PHY > + > +This is the PHY associated with the IMX7d PCIe controller. It's used by the > +PCI-e controller via the fsl,imx7d-pcie-phy phandle. > + > +Required properties: > +- compatible: > > + - "fsl,imx7d-pcie-phy" > +- reg: base address and length of the PCIe PHY controller
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt index d514c1f2365f..f4933c8951bc 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt @@ -53,6 +53,7 @@ Additional required properties for imx7d-pcie: - "pciephy" - "apps" - "turnoff" +- fsl,imx7d-pcie-phy: A phandle to an fsl,imx7d-pcie-phy node. Example: @@ -79,3 +80,13 @@ Example: clocks = <&clks 144>, <&clks 206>, <&clks 189>; clock-names = "pcie", "pcie_bus", "pcie_phy"; }; + +* Freescale i.MX7d PCIe PHY + +This is the PHY associated with the IMX7d PCIe controller. It's used by the +PCI-e controller via the fsl,imx7d-pcie-phy phandle. + +Required properties: +- compatible: + - "fsl,imx7d-pcie-phy" +- reg: base address and length of the PCIe PHY controller
There is a separate PHY device with its own registers on imx7d. It's currently unused, but a PCIe erratum on imx7d will require it for the workaround. Signed-off-by: Trent Piepho <tpiepho@impinj.com> --- Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 11 +++++++++++ 1 file changed, 11 insertions(+)