@@ -104,6 +104,19 @@ static u64 nic_reg_read(struct nicpf *nic, u64 offset)
return readq_relaxed(nic->reg_base + offset);
}
+static int nic_is_mbox_intr_active(struct nicpf *nic, int vf_id)
+{
+ int ret = 0;
+
+ if (vf_id < NIC_VF_PER_MBX_REG) {
+ ret = nic_reg_read(nic, NIC_PF_MAILBOX_INT) & BIT_ULL(vf_id);
+ } else {
+ ret = nic_reg_read(nic, NIC_PF_MAILBOX_INT + sizeof(u64)) &
+ BIT_ULL(vf_id - NIC_VF_PER_MBX_REG);
+ }
+ return ret;
+}
+
/* PF -> VF mailbox communication APIs */
static void nic_enable_mbx_intr(struct nicpf *nic)
{
@@ -1801,6 +1801,20 @@ void nicvf_clear_intr(struct nicvf *nic, int int_type, int q_idx)
nicvf_reg_write(nic, NIC_VF_INT, mask);
}
+/* Check if interrupt is active */
+int nicvf_check_is_intr_active(struct nicvf *nic, int int_type, int q_idx)
+{
+ u64 mask = nicvf_int_type_to_mask(int_type, q_idx);
+
+ if (!mask) {
+ netdev_dbg(nic->netdev,
+ "Failed to read interrupt status: unknown type\n");
+ return 0;
+ }
+
+ return (mask & nicvf_reg_read(nic, NIC_VF_INT));
+}
+
/* Check if interrupt is enabled */
int nicvf_is_intr_enabled(struct nicvf *nic, int int_type, int q_idx)
{
@@ -358,6 +358,7 @@ void nicvf_enable_intr(struct nicvf *nic, int int_type, int q_idx);
void nicvf_disable_intr(struct nicvf *nic, int int_type, int q_idx);
void nicvf_clear_intr(struct nicvf *nic, int int_type, int q_idx);
int nicvf_is_intr_enabled(struct nicvf *nic, int int_type, int q_idx);
+int nicvf_check_is_intr_active(struct nicvf *nic, int int_type, int q_idx);
/* Register access APIs */
void nicvf_reg_write(struct nicvf *nic, u64 offset, u64 val);
This commit is to implement routines to read mailbox IRQ status for particular VF at PF side, and for mailbox IRQ status from PF at VF side. Signed-off-by: Vadim Lomovtsev <vlomovtsev@marvell.com> --- drivers/net/ethernet/cavium/thunder/nic_main.c | 13 +++++++++++++ drivers/net/ethernet/cavium/thunder/nicvf_queues.c | 14 ++++++++++++++ drivers/net/ethernet/cavium/thunder/nicvf_queues.h | 1 + 3 files changed, 28 insertions(+)