| Message ID | 20190212015108.16952-3-andrew.smirnov@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | "pcie_aux" clock for i.MX8MQ | expand |
Am Montag, den 11.02.2019, 17:51 -0800 schrieb Andrey Smirnov: > PCIe IP block has additional clock, "pcie_aux", that needs to be > controlled by the driver. Add code to support that. > > Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> > Cc: Bjorn Helgaas <bhelgaas@google.com> > Cc: Fabio Estevam <fabio.estevam@nxp.com> > Cc: Chris Healy <cphealy@gmail.com> > Cc: Lucas Stach <l.stach@pengutronix.de> > Cc: Leonard Crestez <leonard.crestez@nxp.com> > Cc: "A.s. Dong" <aisheng.dong@nxp.com> > Cc: Richard Zhu <hongxing.zhu@nxp.com> > Cc: linux-imx@nxp.com > Cc: linux-arm-kernel@lists.infradead.org > Cc: linux-kernel@vger.kernel.org > Cc: linux-pci@vger.kernel.org > Cc: Rob Herring <robh@kernel.org> > Cc: devicetree@vger.kernel.org Reviewed-by: Lucas Stach <l.stach@pengutronix.de> > --- > drivers/pci/controller/dwc/pci-imx6.c | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c > index 7cdf8f9ab244..1a7031782846 100644 > --- a/drivers/pci/controller/dwc/pci-imx6.c > +++ b/drivers/pci/controller/dwc/pci-imx6.c > @@ -65,6 +65,7 @@ struct imx6_pcie { > struct clk *pcie_phy; > struct clk *pcie_inbound_axi; > struct clk *pcie; > + struct clk *pcie_aux; > struct regmap *iomuxc_gpr; > u32 controller_id; > struct reset_control *pciephy_reset; > @@ -421,6 +422,12 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie) > case IMX7D: > break; > case IMX8MQ: > + ret = clk_prepare_enable(imx6_pcie->pcie_aux); > + if (ret) { > + dev_err(dev, "unable to enable pcie_aux clock\n"); > + break; > + } > + > offset = imx6_pcie_grp_offset(imx6_pcie); > /* > * Set the over ride low and enabled > @@ -904,6 +911,9 @@ static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie) > IMX7D_GPR12_PCIE_PHY_REFCLK_SEL, > IMX7D_GPR12_PCIE_PHY_REFCLK_SEL); > break; > + case IMX8MQ: > + clk_disable_unprepare(imx6_pcie->pcie_aux); > + break; > default: > break; > } > @@ -1049,6 +1059,12 @@ static int imx6_pcie_probe(struct platform_device *pdev) > dev_err(dev, "Failed to get PCIE APPS reset control\n"); > return PTR_ERR(imx6_pcie->apps_reset); > } > + > + imx6_pcie->pcie_aux = devm_clk_get(dev, "pcie_aux"); > + if (IS_ERR(imx6_pcie->pcie_aux)) { > + dev_err(dev, "pcie_aux clock source missing or invalid\n"); > + return PTR_ERR(imx6_pcie->pcie_aux); > + } > break; > default: > break;
On Tue, 2019-02-12 at 10:36 +0100, Lucas Stach wrote: > Am Montag, den 11.02.2019, 17:51 -0800 schrieb Andrey Smirnov: > > PCIe IP block has additional clock, "pcie_aux", that needs to be > > controlled by the driver. Add code to support that. This breaks iMX7d. > > > > @@ -1049,6 +1059,12 @@ static int imx6_pcie_probe(struct platform_device *pdev) > > dev_err(dev, "Failed to get PCIE APPS reset control\n"); > > return PTR_ERR(imx6_pcie->apps_reset); > > } > > + > > + imx6_pcie->pcie_aux = devm_clk_get(dev, "pcie_aux"); > > + if (IS_ERR(imx6_pcie->pcie_aux)) { > > + dev_err(dev, "pcie_aux clock source missing or invalid\n"); > > + return PTR_ERR(imx6_pcie->pcie_aux); > > + } > > break; > > default: > > break; One can't see enough context in the patch above, but in linux-next this section is under case IMX7D: case IMX8MQ: It's being applied to imx7d and not just imx8mq and so breaks because imx7d dts files don't have this clock. Not sure if this is a bug in this commit or some kind of merge/rebase mistake.
On Thu, Feb 28, 2019 at 1:24 PM Trent Piepho <tpiepho@impinj.com> wrote: > > On Tue, 2019-02-12 at 10:36 +0100, Lucas Stach wrote: > > Am Montag, den 11.02.2019, 17:51 -0800 schrieb Andrey Smirnov: > > > PCIe IP block has additional clock, "pcie_aux", that needs to be > > > controlled by the driver. Add code to support that. > > This breaks iMX7d. > Ugh, my bad, sorry about that. > > > > > > @@ -1049,6 +1059,12 @@ static int imx6_pcie_probe(struct platform_device *pdev) > > > dev_err(dev, "Failed to get PCIE APPS reset control\n"); > > > return PTR_ERR(imx6_pcie->apps_reset); > > > } > > > + > > > + imx6_pcie->pcie_aux = devm_clk_get(dev, "pcie_aux"); > > > + if (IS_ERR(imx6_pcie->pcie_aux)) { > > > + dev_err(dev, "pcie_aux clock source missing or invalid\n"); > > > + return PTR_ERR(imx6_pcie->pcie_aux); > > > + } > > > break; > > > default: > > > break; > > One can't see enough context in the patch above, but in linux-next this > section is under > > case IMX7D: > case IMX8MQ: > > It's being applied to imx7d and not just imx8mq and so breaks because > imx7d dts files don't have this clock. Not sure if this is a bug in > this commit or some kind of merge/rebase mistake. > This is just a regular bug, I spaced out and missed the fact that this path is shared between the two. I'll submit a patch moving "pci_aux" clock request into a i.MX8MQ specific patch shortly. Thanks, Andrey Smirnov
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 7cdf8f9ab244..1a7031782846 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -65,6 +65,7 @@ struct imx6_pcie { struct clk *pcie_phy; struct clk *pcie_inbound_axi; struct clk *pcie; + struct clk *pcie_aux; struct regmap *iomuxc_gpr; u32 controller_id; struct reset_control *pciephy_reset; @@ -421,6 +422,12 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie) case IMX7D: break; case IMX8MQ: + ret = clk_prepare_enable(imx6_pcie->pcie_aux); + if (ret) { + dev_err(dev, "unable to enable pcie_aux clock\n"); + break; + } + offset = imx6_pcie_grp_offset(imx6_pcie); /* * Set the over ride low and enabled @@ -904,6 +911,9 @@ static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie) IMX7D_GPR12_PCIE_PHY_REFCLK_SEL, IMX7D_GPR12_PCIE_PHY_REFCLK_SEL); break; + case IMX8MQ: + clk_disable_unprepare(imx6_pcie->pcie_aux); + break; default: break; } @@ -1049,6 +1059,12 @@ static int imx6_pcie_probe(struct platform_device *pdev) dev_err(dev, "Failed to get PCIE APPS reset control\n"); return PTR_ERR(imx6_pcie->apps_reset); } + + imx6_pcie->pcie_aux = devm_clk_get(dev, "pcie_aux"); + if (IS_ERR(imx6_pcie->pcie_aux)) { + dev_err(dev, "pcie_aux clock source missing or invalid\n"); + return PTR_ERR(imx6_pcie->pcie_aux); + } break; default: break;
PCIe IP block has additional clock, "pcie_aux", that needs to be controlled by the driver. Add code to support that. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Leonard Crestez <leonard.crestez@nxp.com> Cc: "A.s. Dong" <aisheng.dong@nxp.com> Cc: Richard Zhu <hongxing.zhu@nxp.com> Cc: linux-imx@nxp.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-pci@vger.kernel.org Cc: Rob Herring <robh@kernel.org> Cc: devicetree@vger.kernel.org --- drivers/pci/controller/dwc/pci-imx6.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)