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Based on "DRM kernel-internal display mode structure" from include/drm/drm_modes.h hblk = htotal - (hsync value); hblk = htotal - (hsync_end - hsync_start); Current driver is subtracting htotal with hsa, but the hsa is bounded with packet overhead. So subtract htotal with hsync value(hsync_end - hsync_start) proper hblk computation. BPI-M64-bsp is computing hbp as (from linux-sunxi/ drivers/video/sunxi/disp2/disp/de/lowlevel_sun50iw1/de_dsi.c) dsi_hblk = (ht-hspw)*dsi_pixel_bits[format]/8-(4+4+2); => (timmings->hor_total_time - timmings->hor_sync_time) => (mode->htotal - (mode->hsync_end - mode->hsync_start)) So, update the hblk value accordingly in sun6i_dsi_setup_timings. Tested on 2-lane, 4-lane MIPI-DSI LCD panels. Signed-off-by: Jagan Teki --- drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c index 21f39f11a8de..6b26dba883e8 100644 --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c @@ -486,7 +486,7 @@ static void sun6i_dsi_setup_timings(struct sun6i_dsi *dsi, /* * hblk seems to be the line + porches length. */ - hblk = mode->htotal * Bpp - hsa; + hblk = (mode->htotal - (mode->hsync_end - mode->hsync_start)) * Bpp; /* * And I'm not entirely sure what vblk is about. The driver in