diff mbox series

[v3,2/5] arm64: dts: imx8mq: Add SAI2 node

Message ID 20190226070742.30551-3-daniel.baluta@nxp.com (mailing list archive)
State New, archived
Headers show
Series Enable wm8524 on i.MX8MQ | expand

Commit Message

Daniel Baluta Feb. 26, 2019, 7:08 a.m. UTC
SAI2 is part of AIPS-3 memory region and it's the DAI through
which the wm8524 codec gets its data.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8mq.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

Comments

Fabio Estevam Feb. 26, 2019, 12:54 p.m. UTC | #1
On Tue, Feb 26, 2019 at 4:08 AM Daniel Baluta <daniel.baluta@nxp.com> wrote:
>
> SAI2 is part of AIPS-3 memory region and it's the DAI through
> which the wm8524 codec gets its data.

Please do not mention wm8524 in a SoC dtsi file commit message.

It is the imx8mq-evk board that uses this codec and this information
is not SoC related.
Daniel Baluta Feb. 26, 2019, 1:06 p.m. UTC | #2
On Tue, Feb 26, 2019 at 2:55 PM Fabio Estevam <festevam@gmail.com> wrote:
>
> On Tue, Feb 26, 2019 at 4:08 AM Daniel Baluta <daniel.baluta@nxp.com> wrote:
> >
> > SAI2 is part of AIPS-3 memory region and it's the DAI through
> > which the wm8524 codec gets its data.
>
> Please do not mention wm8524 in a SoC dtsi file commit message.
>
> It is the imx8mq-evk board that uses this codec and this information
> is not SoC related.

Got it. Thanks for the comment. Will fix in next version.
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 8cafec17726b..6fe5798afd2d 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -489,6 +489,22 @@ 
 				status = "disabled";
 			};
 
+			sai2: sai@308b0000 {
+				#sound-dai-cells = <0>;
+				compatible = "fsl,imx8mq-sai",
+					     "fsl,imx6sx-sai";
+				reg = <0x308b0000 0x10000>;
+				interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clk IMX8MQ_CLK_SAI2_IPG>,
+					 <&clk IMX8MQ_CLK_DUMMY>,
+					 <&clk IMX8MQ_CLK_SAI2_ROOT>,
+					 <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
+				clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+				dmas = <&sdma1 10 24 0>, <&sdma1 11 24 0>;
+				dma-names = "rx", "tx";
+				status = "disabled";
+			};
+
 			i2c1: i2c@30a20000 {
 				compatible = "fsl,imx8mq-i2c", "fsl,imx21-i2c";
 				reg = <0x30a20000 0x10000>;