| Message ID | 20190227170608.27963-4-steven.price@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Convert x86 & arm64 to use generic page walk | expand |
On Wed, Feb 27, 2019 at 05:05:37PM +0000, Steven Price wrote: > walk_page_range() is going to be allowed to walk page tables other than > those of user space. For this it needs to know when it has reached a > 'leaf' entry in the page tables. This information will be provided by the > p?d_large() functions/macros. > > For arm, we already provide most p?d_large() macros. Add a stub for PUD > as we don't have huge pages at that level. We do not have PUD for 2- and 3-level paging. Macros from generic header should cover it, shouldn't it?
On 01/03/2019 21:47, Kirill A. Shutemov wrote: > On Wed, Feb 27, 2019 at 05:05:37PM +0000, Steven Price wrote: >> walk_page_range() is going to be allowed to walk page tables other than >> those of user space. For this it needs to know when it has reached a >> 'leaf' entry in the page tables. This information will be provided by the >> p?d_large() functions/macros. >> >> For arm, we already provide most p?d_large() macros. Add a stub for PUD >> as we don't have huge pages at that level. > > We do not have PUD for 2- and 3-level paging. Macros from generic header > should cover it, shouldn't it? > I'm not sure of the reasoning behind this, but levels are folded in a slightly strange way. arm/include/asm/pgtable.h defines __ARCH_USE_5LEVEL_HACK which means: PGD has 2048 (2-level) or 4 (3-level) entries which are always considered 'present' (pgd_present() returns 1 defined in asm-generic/pgtables-nop4d-hack.h). P4D has 1 entry which is always present (see asm-generic/5level-fixup.h) PUD has 1 entry (see asm-generic/pgtable-nop4d-hack.h). This is always present for 2-level, and present only if the first level of real page table is present with a 3-level. PMD/PTE are as you might expect. So in terms of tables which are more than one entry you have PGD, (optionally) PMD, PTE. But the levels which actually read the table entries are PUD, PMD, PTE. This means that the corresponding p?d_large() macros are needed for PUD/PMD as that is where the actual entries are read. The asm-generic files provide the definitions for PGD/P4D. Steve
On Mon, Mar 04, 2019 at 11:56:13AM +0000, Steven Price wrote: > On 01/03/2019 21:47, Kirill A. Shutemov wrote: > > On Wed, Feb 27, 2019 at 05:05:37PM +0000, Steven Price wrote: > >> walk_page_range() is going to be allowed to walk page tables other than > >> those of user space. For this it needs to know when it has reached a > >> 'leaf' entry in the page tables. This information will be provided by the > >> p?d_large() functions/macros. > >> > >> For arm, we already provide most p?d_large() macros. Add a stub for PUD > >> as we don't have huge pages at that level. > > > > We do not have PUD for 2- and 3-level paging. Macros from generic header > > should cover it, shouldn't it? > > > > I'm not sure of the reasoning behind this, but levels are folded in a > slightly strange way. arm/include/asm/pgtable.h defines > __ARCH_USE_5LEVEL_HACK which means: > > PGD has 2048 (2-level) or 4 (3-level) entries which are always > considered 'present' (pgd_present() returns 1 defined in > asm-generic/pgtables-nop4d-hack.h). > > P4D has 1 entry which is always present (see asm-generic/5level-fixup.h) > > PUD has 1 entry (see asm-generic/pgtable-nop4d-hack.h). This is always > present for 2-level, and present only if the first level of real page > table is present with a 3-level. > > PMD/PTE are as you might expect. > > So in terms of tables which are more than one entry you have PGD, > (optionally) PMD, PTE. But the levels which actually read the table > entries are PUD, PMD, PTE. > > This means that the corresponding p?d_large() macros are needed for > PUD/PMD as that is where the actual entries are read. The asm-generic > files provide the definitions for PGD/P4D. Makes sense. Only additional thing worth nothing that ARM in 2-level paging case folds PMD manually without help from generic headres. I'm partly responsible for the mess with folding. Sorry that you need to explain this to :P
diff --git a/arch/arm/include/asm/pgtable-2level.h b/arch/arm/include/asm/pgtable-2level.h index 12659ce5c1f3..adcef1306892 100644 --- a/arch/arm/include/asm/pgtable-2level.h +++ b/arch/arm/include/asm/pgtable-2level.h @@ -183,6 +183,7 @@ #define pud_none(pud) (0) #define pud_bad(pud) (0) #define pud_present(pud) (1) +#define pud_large(pud) (0) #define pud_clear(pudp) do { } while (0) #define set_pud(pud,pudp) do { } while (0) diff --git a/arch/arm/include/asm/pgtable-3level.h b/arch/arm/include/asm/pgtable-3level.h index 6d50a11d7793..9f63a4b89f45 100644 --- a/arch/arm/include/asm/pgtable-3level.h +++ b/arch/arm/include/asm/pgtable-3level.h @@ -141,6 +141,7 @@ #define pud_none(pud) (!pud_val(pud)) #define pud_bad(pud) (!(pud_val(pud) & 2)) #define pud_present(pud) (pud_val(pud)) +#define pud_large(pud) (0) #define pmd_table(pmd) ((pmd_val(pmd) & PMD_TYPE_MASK) == \ PMD_TYPE_TABLE) #define pmd_sect(pmd) ((pmd_val(pmd) & PMD_TYPE_MASK) == \
walk_page_range() is going to be allowed to walk page tables other than those of user space. For this it needs to know when it has reached a 'leaf' entry in the page tables. This information will be provided by the p?d_large() functions/macros. For arm, we already provide most p?d_large() macros. Add a stub for PUD as we don't have huge pages at that level. CC: Russell King <linux@armlinux.org.uk> Signed-off-by: Steven Price <steven.price@arm.com> --- arch/arm/include/asm/pgtable-2level.h | 1 + arch/arm/include/asm/pgtable-3level.h | 1 + 2 files changed, 2 insertions(+)