@@ -263,7 +263,7 @@ static SUNXI_CCU_GATE(bus_de_fe_clk, "bus-de-fe", "ahb1",
static SUNXI_CCU_GATE(bus_gpu_clk, "bus-gpu", "ahb1",
0x064, BIT(20), 0);
static SUNXI_CCU_GATE(bus_msgbox_clk, "bus-msgbox", "ahb1",
- 0x064, BIT(21), 0);
+ 0x064, BIT(21), CLK_IS_CRITICAL);
static SUNXI_CCU_GATE(bus_spinlock_clk, "bus-spinlock", "ahb1",
0x064, BIT(22), 0);
static SUNXI_CCU_GATE(bus_drc_clk, "bus-drc", "ahb1",
@@ -275,7 +275,7 @@ static SUNXI_CCU_GATE(bus_de_fe_clk, "bus-de-fe", "ahb1",
static SUNXI_CCU_GATE(bus_gpu_clk, "bus-gpu", "ahb1",
0x064, BIT(20), 0);
static SUNXI_CCU_GATE(bus_msgbox_clk, "bus-msgbox", "ahb1",
- 0x064, BIT(21), 0);
+ 0x064, BIT(21), CLK_IS_CRITICAL);
static SUNXI_CCU_GATE(bus_spinlock_clk, "bus-spinlock", "ahb1",
0x064, BIT(22), 0);
static SUNXI_CCU_GATE(bus_drc_clk, "bus-drc", "ahb1",
@@ -347,7 +347,7 @@ static SUNXI_CCU_GATE(bus_de_clk, "bus-de", "ahb1",
static SUNXI_CCU_GATE(bus_gpu_clk, "bus-gpu", "ahb1",
0x064, BIT(20), 0);
static SUNXI_CCU_GATE(bus_msgbox_clk, "bus-msgbox", "ahb1",
- 0x064, BIT(21), 0);
+ 0x064, BIT(21), CLK_IS_CRITICAL);
static SUNXI_CCU_GATE(bus_spinlock_clk, "bus-spinlock", "ahb1",
0x064, BIT(22), 0);
@@ -281,7 +281,7 @@ static SUNXI_CCU_GATE(bus_de_clk, "bus-de", "ahb1",
static SUNXI_CCU_GATE(bus_gpu_clk, "bus-gpu", "ahb1",
0x064, BIT(20), 0);
static SUNXI_CCU_GATE(bus_msgbox_clk, "bus-msgbox", "ahb1",
- 0x064, BIT(21), 0);
+ 0x064, BIT(21), CLK_IS_CRITICAL);
static SUNXI_CCU_GATE(bus_spinlock_clk, "bus-spinlock", "ahb1",
0x064, BIT(22), 0);
The msgbox clock is critical because the hardware is shared between Linux and system firmware. The message box may be used by the EL3 secure monitor's PSCI implementation. On 64-bit sunxi SoCs, this is provided by ARM TF-A; 32-bit SoCs use a different implementation. The secure monitor uses the message box to forward requests to power management firmware running on a separate CPU. It is not enough for the secure monitor to enable the clock each time Linux performs a SMC into EL3, as both the firmware and Linux can run concurrently on separate CPUs. So it is never safe for Linux to turn this clock off, and it should be marked as critical. At this time, such power management firmware only exists for the H5. However, it makes sense to take care of all CCU drivers now for consistency, and to ease the transition in the future, once firmware is ported to the other SoCs. Signed-off-by: Samuel Holland <samuel@sholland.org> --- drivers/clk/sunxi-ng/ccu-sun8i-a23.c | 2 +- drivers/clk/sunxi-ng/ccu-sun8i-a33.c | 2 +- drivers/clk/sunxi-ng/ccu-sun8i-a83t.c | 2 +- drivers/clk/sunxi-ng/ccu-sun8i-h3.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-)