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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id r15sm5756563wrt.37.2019.03.07.07.13.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 07 Mar 2019 07:13:47 -0800 (PST) From: Neil Armstrong To: khilman@baylibre.com Subject: [PATCH 5/9] arm64: dts: meson: g12a: add reset controller Date: Thu, 7 Mar 2019 16:13:37 +0100 Message-Id: <20190307151342.7381-6-narmstrong@baylibre.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190307151342.7381-1-narmstrong@baylibre.com> References: <20190307151342.7381-1-narmstrong@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190307_071349_178171_EE7B1DAA X-CRM114-Status: GOOD ( 10.49 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-amlogic@lists.infradead.org, Neil Armstrong , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Jerome Brunet Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Jerome Brunet Add the reset controller device of g12a SoC family Signed-off-by: Jerome Brunet Signed-off-by: Neil Armstrong Reviewed-by: Martin Blumenstingl --- arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi index f8f055c49f9a..2a700bb45d04 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi @@ -245,6 +245,13 @@ #size-cells = <2>; ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x100000>; + reset: reset-controller@1004 { + compatible = "amlogic,meson-g12a-reset", + "amlogic,meson-axg-reset"; + reg = <0x0 0x1004 0x0 0x9c>; + #reset-cells = <1>; + }; + clk_msr: clock-measure@18000 { compatible = "amlogic,meson-g12a-clk-measure"; reg = <0x0 0x18000 0x0 0x10>;