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Tue, 02 Apr 2019 17:19:27 -0700 (PDT) Received: by voyager.jms.id.au (sSMTP sendmail emulation); Wed, 03 Apr 2019 10:49:20 +1030 From: Joel Stanley To: Daniel Vetter , Rob Herring Subject: [PATCH v3 1/3] dt-bindings: gpu: Add ASPEED GFX bindings document Date: Wed, 3 Apr 2019 10:49:07 +1030 Message-Id: <20190403001909.31637-2-joel@jms.id.au> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190403001909.31637-1-joel@jms.id.au> References: <20190403001909.31637-1-joel@jms.id.au> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190402_171929_509770_47BE5FFE X-CRM114-Status: GOOD ( 13.83 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-aspeed@lists.ozlabs.org, David Airlie , Maarten Lankhorst , dri-devel@lists.freedesktop.org, Andrew Jeffery , =?utf-8?q?Noralf_Tr=C3=B8nnes?= , Sean Paul , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This describes the ASPEED BMC SoC's display controller. Signed-off-by: Joel Stanley Reviewed-by: Andrew Jeffery --- v3: Add Andrew's reviewed-by .../devicetree/bindings/gpu/aspeed-gfx.txt | 41 +++++++++++++++++++ 1 file changed, 41 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpu/aspeed-gfx.txt diff --git a/Documentation/devicetree/bindings/gpu/aspeed-gfx.txt b/Documentation/devicetree/bindings/gpu/aspeed-gfx.txt new file mode 100644 index 000000000000..a74033332668 --- /dev/null +++ b/Documentation/devicetree/bindings/gpu/aspeed-gfx.txt @@ -0,0 +1,41 @@ +Device tree configuration for the GFX display deivce on the AST2500 SoCs. + +Required properties: + - compatible + * Must be one of the following: + + aspeed,ast2500-gfx + + aspeed,ast2400-gfx + * In addition, the ASPEED pinctrl bindings require the 'syscon' property to + be present + + - reg: Physical base address and length of the GFX registers + + - interrupts: interrupt number for the GFX device + + - clocks: clock number used to generate the pixel clock + + - resets: reset line that must be released to use the GFX device + + - memory-region: + Phandle to a memory region to allocate from, as defined in + Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt + + +Example: + +gfx: display@1e6e6000 { + compatible = "aspeed,ast2500-gfx", "syscon"; + reg = <0x1e6e6000 0x1000>; + reg-io-width = <4>; + clocks = <&syscon ASPEED_CLK_GATE_D1CLK>; + resets = <&syscon ASPEED_RESET_CRT1>; + interrupts = <0x19>; + memory-region = <&gfx_memory>; +}; + +gfx_memory: framebuffer { + size = <0x01000000>; + alignment = <0x01000000>; + compatible = "shared-dma-pool"; + reusable; +};