| Message ID | 20190416085446.84071-2-jitao.shi@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | add dsi and pwm0 nodes to mt8183 device tree | expand |
Hi, Jitao: On Tue, 2019-04-16 at 16:54 +0800, Jitao Shi wrote: > Add dsi and mipitx nodes to the mt8183 > > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > --- > arch/arm64/boot/dts/mediatek/mt8183.dtsi | 25 ++++++++++++++++++++++++ > 1 file changed, 25 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > index b36e37fcdfe3..80929a0e5a6f 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > @@ -353,6 +353,16 @@ > status = "disabled"; > }; > > + mipi_tx0: mipi-dphy@11e50000 { > + compatible = "mediatek,mt8183-mipi-tx"; > + reg = <0 0x11e50000 0 0x1000>; > + clocks = <&apmixedsys CLK_APMIXED_MIPID0_26M>; > + clock-names = "ref_clk"; > + #clock-cells = <0>; > + #phy-cells = <0>; > + clock-output-names = "mipi_tx0_pll"; > + }; > + > mfgcfg: syscon@13000000 { > compatible = "mediatek,mt8183-mfgcfg", "syscon"; > reg = <0 0x13000000 0 0x1000>; > @@ -365,6 +375,21 @@ > #clock-cells = <1>; > }; > > + dsi0: dsi@14014000 { > + compatible = "mediatek,mt8173-dsi", > + "mediatek,mt8183-dsi"; I think you could directly remove "mediatek,mt8173-dsi". Regards, CK > + reg = <0 0x14014000 0 0x1000>; > + interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_LOW>; > + power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > + mediatek,syscon-dsi = <&mmsys 0x140>; > + clocks = <&mmsys CLK_MM_DSI0_MM>, > + <&mmsys CLK_MM_DSI0_IF>, > + <&mipi_tx0>; > + clock-names = "engine", "digital", "hs"; > + phys = <&mipi_tx0>; > + phy-names = "dphy"; > + }; > + > smi_common: smi@14019000 { > compatible = "mediatek,mt8183-smi-common", "syscon"; > reg = <0 0x14019000 0 0x1000>;
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index b36e37fcdfe3..80929a0e5a6f 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -353,6 +353,16 @@ status = "disabled"; }; + mipi_tx0: mipi-dphy@11e50000 { + compatible = "mediatek,mt8183-mipi-tx"; + reg = <0 0x11e50000 0 0x1000>; + clocks = <&apmixedsys CLK_APMIXED_MIPID0_26M>; + clock-names = "ref_clk"; + #clock-cells = <0>; + #phy-cells = <0>; + clock-output-names = "mipi_tx0_pll"; + }; + mfgcfg: syscon@13000000 { compatible = "mediatek,mt8183-mfgcfg", "syscon"; reg = <0 0x13000000 0 0x1000>; @@ -365,6 +375,21 @@ #clock-cells = <1>; }; + dsi0: dsi@14014000 { + compatible = "mediatek,mt8173-dsi", + "mediatek,mt8183-dsi"; + reg = <0 0x14014000 0 0x1000>; + interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_LOW>; + power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; + mediatek,syscon-dsi = <&mmsys 0x140>; + clocks = <&mmsys CLK_MM_DSI0_MM>, + <&mmsys CLK_MM_DSI0_IF>, + <&mipi_tx0>; + clock-names = "engine", "digital", "hs"; + phys = <&mipi_tx0>; + phy-names = "dphy"; + }; + smi_common: smi@14019000 { compatible = "mediatek,mt8183-smi-common", "syscon"; reg = <0 0x14019000 0 0x1000>;
Add dsi and mipitx nodes to the mt8183 Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 25 ++++++++++++++++++++++++ 1 file changed, 25 insertions(+)