mbox series

[GIT,PULL,1/3] SoCFPGA DTS updates for v5.2

Message ID 20190416151140.2598-1-dinguyen@kernel.org (mailing list archive)
State Mainlined, archived
Commit 4b36daf9ada30a66c93f8701e8c6f23bc3ce94e2
Headers show
Series [GIT,PULL,1/3] SoCFPGA DTS updates for v5.2 | expand

Pull-request

git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux.git tags/socfpga_dts_updates_for_v5.2

Message

Dinh Nguyen April 16, 2019, 3:11 p.m. UTC
Hi Arnd, Kevin, and Olof:

Please pull in these SoCFPGA DTS updates for v5.2.

Thanks,
Dinh

The following changes since commit 9e98c678c2d6ae3a17cb2de55d17f69dddaa231b:

  Linux 5.1-rc1 (2019-03-17 14:22:26 -0700)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux.git tags/socfpga_dts_updates_for_v5.2

for you to fetch changes up to 4b36daf9ada30a66c93f8701e8c6f23bc3ce94e2:

  arm64: dts: agilex: Add initial support for Intel's Agilex SoCFPGA (2019-04-05 16:36:07 -0500)

----------------------------------------------------------------
SoCFPGA DTS updates for v5.2
- Add base support for Agilex platform
- Add 'cap-mmc-highspeed' Stratix10 and 32-bit SoCFPGA platform
- Increase Stratix10 QSPI support to 100 MHz

----------------------------------------------------------------
Dinh Nguyen (4):
      ARM: dts: socfpga: enable MMC highspeed support
      arm64: dts: stratix10: enable MMC highspeed support
      arm64: dts: stratix10: increase QSPI max frequency to 100MHz
      arm64: dts: agilex: Add initial support for Intel's Agilex SoCFPGA

 arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts  |   1 +
 arch/arm64/Kconfig.platforms                       |   5 +
 arch/arm64/boot/dts/Makefile                       |   1 +
 .../boot/dts/altera/socfpga_stratix10_socdk.dts    |   3 +-
 arch/arm64/boot/dts/intel/Makefile                 |   1 +
 arch/arm64/boot/dts/intel/socfpga_agilex.dtsi      | 444 +++++++++++++++++++++
 arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts |  75 ++++
 7 files changed, 529 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm64/boot/dts/intel/Makefile
 create mode 100644 arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
 create mode 100644 arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts

Comments

Olof Johansson April 28, 2019, 7:38 p.m. UTC | #1
On Tue, Apr 16, 2019 at 10:11:38AM -0500, Dinh Nguyen wrote:
> Hi Arnd, Kevin, and Olof:
> 
> Please pull in these SoCFPGA DTS updates for v5.2.
> 
> Thanks,
> Dinh
> 
> The following changes since commit 9e98c678c2d6ae3a17cb2de55d17f69dddaa231b:
> 
>   Linux 5.1-rc1 (2019-03-17 14:22:26 -0700)
> 
> are available in the Git repository at:
> 
>   git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux.git tags/socfpga_dts_updates_for_v5.2
> 
> for you to fetch changes up to 4b36daf9ada30a66c93f8701e8c6f23bc3ce94e2:
> 
>   arm64: dts: agilex: Add initial support for Intel's Agilex SoCFPGA (2019-04-05 16:36:07 -0500)
> 
> ----------------------------------------------------------------
> SoCFPGA DTS updates for v5.2
> - Add base support for Agilex platform
> - Add 'cap-mmc-highspeed' Stratix10 and 32-bit SoCFPGA platform
> - Increase Stratix10 QSPI support to 100 MHz
> 
> ----------------------------------------------------------------
> Dinh Nguyen (4):
>       ARM: dts: socfpga: enable MMC highspeed support
>       arm64: dts: stratix10: enable MMC highspeed support
>       arm64: dts: stratix10: increase QSPI max frequency to 100MHz
>       arm64: dts: agilex: Add initial support for Intel's Agilex SoCFPGA
> 
>  arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts  |   1 +
>  arch/arm64/Kconfig.platforms                       |   5 +
>  arch/arm64/boot/dts/Makefile                       |   1 +
>  .../boot/dts/altera/socfpga_stratix10_socdk.dts    |   3 +-
>  arch/arm64/boot/dts/intel/Makefile                 |   1 +
>  arch/arm64/boot/dts/intel/socfpga_agilex.dtsi      | 444 +++++++++++++++++++++
>  arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts |  75 ++++

Merged, even though it's unclear to me if it makes sense to add this under
a new intel/ directory or next to existing socfpga platforms. 


-Olof