| Message ID | 20190419171927.24269-2-pure.logic@nexus-software.ie (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add i.MX8MM support | expand |
On 4/19/2019 8:19 PM, Bryan O'Donoghue wrote: > i.MX6 defines OCOTP_CTRLn:ADDR as seven bit address-field with a one bit > RSVD0 field, i.MX7 defines OCOTP_CTRLn:ADDR as a four bit address-field > with a four bit RSVD0 field. > > i.MX8 defines the OCOTP_CTRLn:ADDR bit-field as a full range eight bits. > > i.MX6 and i.MX7 should return zero for their respective RSVD0 bits and > ignore a write-back of zero where i.MX8 will make use of the full range. > > This patch expands the bit-field definition for all users to eight bits, > which is safe due to RSVD0 being a no-op for the i.MX6 and i.MX7. > > Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com> > --- > drivers/nvmem/imx-ocotp.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/nvmem/imx-ocotp.c b/drivers/nvmem/imx-ocotp.c > index 4cf7b61e4bf5..6600c4ddeb51 100644 > --- a/drivers/nvmem/imx-ocotp.c > +++ b/drivers/nvmem/imx-ocotp.c > @@ -45,7 +45,7 @@ > #define IMX_OCOTP_ADDR_DATA2 0x0040 > #define IMX_OCOTP_ADDR_DATA3 0x0050 > > -#define IMX_OCOTP_BM_CTRL_ADDR 0x0000007F > +#define IMX_OCOTP_BM_CTRL_ADDR 0x000000FF > #define IMX_OCOTP_BM_CTRL_BUSY 0x00000100 > #define IMX_OCOTP_BM_CTRL_ERROR 0x00000200 > #define IMX_OCOTP_BM_CTRL_REL_SHADOWS 0x00000400 >
diff --git a/drivers/nvmem/imx-ocotp.c b/drivers/nvmem/imx-ocotp.c index 4cf7b61e4bf5..6600c4ddeb51 100644 --- a/drivers/nvmem/imx-ocotp.c +++ b/drivers/nvmem/imx-ocotp.c @@ -45,7 +45,7 @@ #define IMX_OCOTP_ADDR_DATA2 0x0040 #define IMX_OCOTP_ADDR_DATA3 0x0050 -#define IMX_OCOTP_BM_CTRL_ADDR 0x0000007F +#define IMX_OCOTP_BM_CTRL_ADDR 0x000000FF #define IMX_OCOTP_BM_CTRL_BUSY 0x00000100 #define IMX_OCOTP_BM_CTRL_ERROR 0x00000200 #define IMX_OCOTP_BM_CTRL_REL_SHADOWS 0x00000400
i.MX6 defines OCOTP_CTRLn:ADDR as seven bit address-field with a one bit RSVD0 field, i.MX7 defines OCOTP_CTRLn:ADDR as a four bit address-field with a four bit RSVD0 field. i.MX8 defines the OCOTP_CTRLn:ADDR bit-field as a full range eight bits. i.MX6 and i.MX7 should return zero for their respective RSVD0 bits and ignore a write-back of zero where i.MX8 will make use of the full range. This patch expands the bit-field definition for all users to eight bits, which is safe due to RSVD0 being a no-op for the i.MX6 and i.MX7. Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> --- drivers/nvmem/imx-ocotp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)