diff mbox series

[6/7] ARM: dts: imx7ulp: add imx7ulp USBOTG1 support

Message ID 20190428024847.5046-7-peter.chen@nxp.com (mailing list archive)
State New, archived
Headers show
Series Add imx7ulp USBOTG1 support | expand

Commit Message

Peter Chen April 28, 2019, 2:51 a.m. UTC
Add imx7ulp USBOTG1 support.

Signed-off-by: Peter Chen <peter.chen@nxp.com>
---
 arch/arm/boot/dts/imx7ulp.dtsi | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

Comments

Rob Herring May 1, 2019, 6:38 p.m. UTC | #1
On Sat, Apr 27, 2019 at 9:51 PM Peter Chen <peter.chen@nxp.com> wrote:
>
> Add imx7ulp USBOTG1 support.
>
> Signed-off-by: Peter Chen <peter.chen@nxp.com>
> ---
>  arch/arm/boot/dts/imx7ulp.dtsi | 30 ++++++++++++++++++++++++++++++
>  1 file changed, 30 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx7ulp.dtsi b/arch/arm/boot/dts/imx7ulp.dtsi
> index fca6e50f37c8..e2944f98eac6 100644
> --- a/arch/arm/boot/dts/imx7ulp.dtsi
> +++ b/arch/arm/boot/dts/imx7ulp.dtsi
> @@ -30,6 +30,7 @@
>                 serial1 = &lpuart5;
>                 serial2 = &lpuart6;
>                 serial3 = &lpuart7;
> +               usbphy0 = &usbphy1;

Drop this. You shouldn't need an alias.

>         };
>
>         cpus {
> @@ -133,6 +134,35 @@
>                         clock-names = "ipg", "per";
>                 };
>
> +               usbotg1: usb@40330000 {
> +                       compatible = "fsl,imx7ulp-usb", "fsl,imx6ul-usb",
> +                               "fsl,imx27-usb";
> +                       reg = <0x40330000 0x200>;
> +                       interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
> +                       clocks = <&pcc2 IMX7ULP_CLK_USB0>;
> +                       fsl,usbphy = <&usbphy1>;

Don't use this for new users. Use the phy binding instead.

> +                       fsl,usbmisc = <&usbmisc1 0>;
> +                       ahb-burst-config = <0x0>;
> +                       tx-burst-size-dword = <0x8>;
> +                       rx-burst-size-dword = <0x8>;
> +                       status = "disabled";
> +               };
> +
> +               usbmisc1: usbmisc@40330200 {
> +                       #index-cells = <1>;
> +                       compatible = "fsl,imx7ulp-usbmisc", "fsl,imx7d-usbmisc",
> +                               "fsl,imx6q-usbmisc";
> +                       reg = <0x40330200 0x200>;
> +               };
> +
> +               usbphy1: usbphy@0x40350000 {
> +                       compatible = "fsl,imx7ulp-usbphy",
> +                               "fsl,imx6ul-usbphy", "fsl,imx23-usbphy";
> +                       reg = <0x40350000 0x1000>;
> +                       interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
> +                       clocks = <&pcc2 IMX7ULP_CLK_USB_PHY>;
> +               };
> +
>                 usdhc0: mmc@40370000 {
>                         compatible = "fsl,imx7ulp-usdhc", "fsl,imx6sx-usdhc";
>                         reg = <0x40370000 0x10000>;
> --
> 2.14.1
>
Peter Chen May 5, 2019, 3:13 a.m. UTC | #2
> > ---
> >  arch/arm/boot/dts/imx7ulp.dtsi | 30 ++++++++++++++++++++++++++++++
> >  1 file changed, 30 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/imx7ulp.dtsi
> > b/arch/arm/boot/dts/imx7ulp.dtsi index fca6e50f37c8..e2944f98eac6
> > 100644
> > --- a/arch/arm/boot/dts/imx7ulp.dtsi
> > +++ b/arch/arm/boot/dts/imx7ulp.dtsi
> > @@ -30,6 +30,7 @@
> >                 serial1 = &lpuart5;
> >                 serial2 = &lpuart6;
> >                 serial3 = &lpuart7;
> > +               usbphy0 = &usbphy1;
> 
> Drop this. You shouldn't need an alias.
> 

It is a derived USB PHY and used on most of i.mx chipidea USB controllers.
At the source code, we use aligned id to know the controller number.

        ret = of_alias_get_id(np, "usbphy");
        if (ret < 0)
                dev_dbg(&pdev->dev, "failed to get alias id, errno %d\n", ret);
        mxs_phy->port_id = ret;

> >         };
> >
> >         cpus {
> > @@ -133,6 +134,35 @@
> >                         clock-names = "ipg", "per";
> >                 };
> >
> > +               usbotg1: usb@40330000 {
> > +                       compatible = "fsl,imx7ulp-usb", "fsl,imx6ul-usb",
> > +                               "fsl,imx27-usb";
> > +                       reg = <0x40330000 0x200>;
> > +                       interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
> > +                       clocks = <&pcc2 IMX7ULP_CLK_USB0>;
> > +                       fsl,usbphy = <&usbphy1>;
> 
> Don't use this for new users. Use the phy binding instead.
> 

It is not a new user, the USB PHY used at imx7ulp is the same with imx6's.

Thanks.

Peter

> > +                       fsl,usbmisc = <&usbmisc1 0>;
> > +                       ahb-burst-config = <0x0>;
> > +                       tx-burst-size-dword = <0x8>;
> > +                       rx-burst-size-dword = <0x8>;
> > +                       status = "disabled";
> > +               };
> > +
> > +               usbmisc1: usbmisc@40330200 {
> > +                       #index-cells = <1>;
> > +                       compatible = "fsl,imx7ulp-usbmisc", "fsl,imx7d-usbmisc",
> > +                               "fsl,imx6q-usbmisc";
> > +                       reg = <0x40330200 0x200>;
> > +               };
> > +
> > +               usbphy1: usbphy@0x40350000 {
> > +                       compatible = "fsl,imx7ulp-usbphy",
> > +                               "fsl,imx6ul-usbphy", "fsl,imx23-usbphy";
> > +                       reg = <0x40350000 0x1000>;
> > +                       interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
> > +                       clocks = <&pcc2 IMX7ULP_CLK_USB_PHY>;
> > +               };
> > +
> >                 usdhc0: mmc@40370000 {
> >                         compatible = "fsl,imx7ulp-usdhc", "fsl,imx6sx-usdhc";
> >                         reg = <0x40370000 0x10000>;
> > --
> > 2.14.1
> >
Rob Herring May 6, 2019, 3:30 p.m. UTC | #3
On Sat, May 4, 2019 at 10:13 PM Peter Chen <peter.chen@nxp.com> wrote:
>
>
> > > ---
> > >  arch/arm/boot/dts/imx7ulp.dtsi | 30 ++++++++++++++++++++++++++++++
> > >  1 file changed, 30 insertions(+)
> > >
> > > diff --git a/arch/arm/boot/dts/imx7ulp.dtsi
> > > b/arch/arm/boot/dts/imx7ulp.dtsi index fca6e50f37c8..e2944f98eac6
> > > 100644
> > > --- a/arch/arm/boot/dts/imx7ulp.dtsi
> > > +++ b/arch/arm/boot/dts/imx7ulp.dtsi
> > > @@ -30,6 +30,7 @@
> > >                 serial1 = &lpuart5;
> > >                 serial2 = &lpuart6;
> > >                 serial3 = &lpuart7;
> > > +               usbphy0 = &usbphy1;
> >
> > Drop this. You shouldn't need an alias.
> >
>
> It is a derived USB PHY and used on most of i.mx chipidea USB controllers.
> At the source code, we use aligned id to know the controller number.
>
>         ret = of_alias_get_id(np, "usbphy");
>         if (ret < 0)
>                 dev_dbg(&pdev->dev, "failed to get alias id, errno %d\n", ret);
>         mxs_phy->port_id = ret;

fsl,anatop property should probably have cell to specify this.

>
> > >         };
> > >
> > >         cpus {
> > > @@ -133,6 +134,35 @@
> > >                         clock-names = "ipg", "per";
> > >                 };
> > >
> > > +               usbotg1: usb@40330000 {
> > > +                       compatible = "fsl,imx7ulp-usb", "fsl,imx6ul-usb",
> > > +                               "fsl,imx27-usb";
> > > +                       reg = <0x40330000 0x200>;
> > > +                       interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
> > > +                       clocks = <&pcc2 IMX7ULP_CLK_USB0>;
> > > +                       fsl,usbphy = <&usbphy1>;
> >
> > Don't use this for new users. Use the phy binding instead.
> >
>
> It is not a new user, the USB PHY used at imx7ulp is the same with imx6's.

New SoC is a new user. The chipidea core already supports using 'phys'
so you should be able to just use the common code.

Rob
Peter Chen May 7, 2019, 1:49 a.m. UTC | #4
> > > > ++++++++++++++++++++++++++++++
> > > >  1 file changed, 30 insertions(+)
> > > >
> > > > diff --git a/arch/arm/boot/dts/imx7ulp.dtsi
> > > > b/arch/arm/boot/dts/imx7ulp.dtsi index fca6e50f37c8..e2944f98eac6
> > > > 100644
> > > > --- a/arch/arm/boot/dts/imx7ulp.dtsi
> > > > +++ b/arch/arm/boot/dts/imx7ulp.dtsi
> > > > @@ -30,6 +30,7 @@
> > > >                 serial1 = &lpuart5;
> > > >                 serial2 = &lpuart6;
> > > >                 serial3 = &lpuart7;
> > > > +               usbphy0 = &usbphy1;
> > >
> > > Drop this. You shouldn't need an alias.
> > >
> >
> > It is a derived USB PHY and used on most of i.mx chipidea USB controllers.
> > At the source code, we use aligned id to know the controller number.
> >
> >         ret = of_alias_get_id(np, "usbphy");
> >         if (ret < 0)
> >                 dev_dbg(&pdev->dev, "failed to get alias id, errno %d\n", ret);
> >         mxs_phy->port_id = ret;
> 
> fsl,anatop property should probably have cell to specify this.
> 

imx7ulp doesn't have anatop part, the analog for imx7ulp is different with imx6.

> >
> > > >         };
> > > >
> > > >         cpus {
> > > > @@ -133,6 +134,35 @@
> > > >                         clock-names = "ipg", "per";
> > > >                 };
> > > >
> > > > +               usbotg1: usb@40330000 {
> > > > +                       compatible = "fsl,imx7ulp-usb", "fsl,imx6ul-usb",
> > > > +                               "fsl,imx27-usb";
> > > > +                       reg = <0x40330000 0x200>;
> > > > +                       interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
> > > > +                       clocks = <&pcc2 IMX7ULP_CLK_USB0>;
> > > > +                       fsl,usbphy = <&usbphy1>;
> > >
> > > Don't use this for new users. Use the phy binding instead.
> > >
> >
> > It is not a new user, the USB PHY used at imx7ulp is the same with imx6's.
> 
> New SoC is a new user. The chipidea core already supports using 'phys'
> so you should be able to just use the common code.
> 

Thanks, will use below, and change the imx glue layer code which "fsl,usbphy" phandle is mandatory now.

phys = <&usbphy1>; /* for usbotg1 */
and
#phy-cells = <0>;  /* for usbphy1 */

Peter
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/imx7ulp.dtsi b/arch/arm/boot/dts/imx7ulp.dtsi
index fca6e50f37c8..e2944f98eac6 100644
--- a/arch/arm/boot/dts/imx7ulp.dtsi
+++ b/arch/arm/boot/dts/imx7ulp.dtsi
@@ -30,6 +30,7 @@ 
 		serial1 = &lpuart5;
 		serial2 = &lpuart6;
 		serial3 = &lpuart7;
+		usbphy0 = &usbphy1;
 	};
 
 	cpus {
@@ -133,6 +134,35 @@ 
 			clock-names = "ipg", "per";
 		};
 
+		usbotg1: usb@40330000 {
+			compatible = "fsl,imx7ulp-usb", "fsl,imx6ul-usb",
+				"fsl,imx27-usb";
+			reg = <0x40330000 0x200>;
+			interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&pcc2 IMX7ULP_CLK_USB0>;
+			fsl,usbphy = <&usbphy1>;
+			fsl,usbmisc = <&usbmisc1 0>;
+			ahb-burst-config = <0x0>;
+			tx-burst-size-dword = <0x8>;
+			rx-burst-size-dword = <0x8>;
+			status = "disabled";
+		};
+
+		usbmisc1: usbmisc@40330200 {
+			#index-cells = <1>;
+			compatible = "fsl,imx7ulp-usbmisc", "fsl,imx7d-usbmisc",
+				"fsl,imx6q-usbmisc";
+			reg = <0x40330200 0x200>;
+		};
+
+		usbphy1: usbphy@0x40350000 {
+			compatible = "fsl,imx7ulp-usbphy",
+				"fsl,imx6ul-usbphy", "fsl,imx23-usbphy";
+			reg = <0x40350000 0x1000>;
+			interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&pcc2 IMX7ULP_CLK_USB_PHY>;
+		};
+
 		usdhc0: mmc@40370000 {
 			compatible = "fsl,imx7ulp-usdhc", "fsl,imx6sx-usdhc";
 			reg = <0x40370000 0x10000>;