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Tue, 30 Apr 2019 13:36:33 +0000 From: Rasmus Villemoes To: Qiang Zhao , Li Yang Subject: [PATCH 4/5] soc/fsl/qe: qe.c: support fsl,qe-snums property Thread-Topic: [PATCH 4/5] soc/fsl/qe: qe.c: support fsl,qe-snums property Thread-Index: AQHU/1m5/ppidONGckmXHq9mm5btWw== Date: Tue, 30 Apr 2019 13:36:33 +0000 Message-ID: <20190430133615.25721-5-rasmus.villemoes@prevas.dk> References: <20190430133615.25721-1-rasmus.villemoes@prevas.dk> In-Reply-To: <20190430133615.25721-1-rasmus.villemoes@prevas.dk> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HE1P18901CA0005.EURP189.PROD.OUTLOOK.COM (2603:10a6:3:8b::15) To VI1PR10MB2672.EURPRD10.PROD.OUTLOOK.COM (2603:10a6:803:e3::20) authentication-results: spf=none (sender IP is ) smtp.mailfrom=Rasmus.Villemoes@prevas.se; x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.20.1 x-originating-ip: [5.186.118.63] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 80a6e09c-05d1-4323-12b5-08d6cd70dc17 x-microsoft-antispam: BCL:0; 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DIR:OUT; SFP:1102; SCL:1; SRVR:VI1PR10MB0735; H:VI1PR10MB2672.EURPRD10.PROD.OUTLOOK.COM; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: prevas.se does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: +U02E9WoIVtOiHzYRRORe2YnVu1SS4BWueGXCxA1AqOSLAM2KfX1b6RvQFF16GXSe6hxlp2K/cpXWG9KkWgeo+aIKh4570AjJuKhMFWDgxzVk+JRTOomi/doY87Q49Ps9oP0NzK6r+5AuExyFTrPJonmMpLieG2ai+HlJVLMq8sowgJFF39JJyoXHGTPhN94sZRBYhjbPRPAUeZDfASmfdVvfQO/mwgu9zYEvogdHvn69iHUrFiJIPFJ3VE+NY9viVlhIw659Qsgx76xqhKCjsGI837vi/HaITpxlemMVNrp0gQyOMQRhtEXR87Ah6sP2V9HmGKFd4xEmJpsAE7EH1XbZzLp46+UNWUO7MKuNrsNicB9MvPfSDauGRO4FGXHMszlvzqikKOyabFvmzOzrS4DKYGfFTdvU4q2vV8UdbY= MIME-Version: 1.0 X-OriginatorOrg: prevas.dk X-MS-Exchange-CrossTenant-Network-Message-Id: 80a6e09c-05d1-4323-12b5-08d6cd70dc17 X-MS-Exchange-CrossTenant-originalarrivaltime: 30 Apr 2019 13:36:33.5066 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: d350cf71-778d-4780-88f5-071a4cb1ed61 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR10MB0735 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190430_063640_843732_76008854 X-CRM114-Status: GOOD ( 16.31 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Valentin Longchamp , "linux-kernel@vger.kernel.org" , Scott Wood , Rasmus Villemoes , Rob Herring , "linuxppc-dev@lists.ozlabs.org" , "linux-arm-kernel@lists.infradead.org" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The current code assumes that the set of snum _values_ to populate the snums[] array with is a function of the _number_ of snums alone. However, reading table 4-30, and its footnotes, of the QUICC Engine Block Reference Manual shows that that is a bit too naive. As an alternative, this introduces a new binding fsl,qe-snums, which automatically encodes both the number of snums and the actual values to use. Conveniently, of_property_read_variable_u8_array does exactly what we need. For example, for the MPC8309, one would specify the property as fsl,qe-snums = /bits/ 8 < 0x88 0x89 0x98 0x99 0xa8 0xa9 0xb8 0xb9 0xc8 0xc9 0xd8 0xd9 0xe8 0xe9>; Signed-off-by: Rasmus Villemoes --- .../devicetree/bindings/soc/fsl/cpm_qe/qe.txt | 8 +++++++- drivers/soc/fsl/qe/qe.c | 14 +++++++++++++- 2 files changed, 20 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt index d7afaff5faff..05f5f485562a 100644 --- a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt +++ b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt @@ -18,7 +18,8 @@ Required properties: - reg : offset and length of the device registers. - bus-frequency : the clock frequency for QUICC Engine. - fsl,qe-num-riscs: define how many RISC engines the QE has. -- fsl,qe-num-snums: define how many serial number(SNUM) the QE can use for the +- fsl,qe-snums: This property has to be specified as '/bits/ 8' value, + defining the array of serial number (SNUM) values for the virtual threads. Optional properties: @@ -34,6 +35,11 @@ Recommended properties - brg-frequency : the internal clock source frequency for baud-rate generators in Hz. +Deprecated properties +- fsl,qe-num-snums: define how many serial number(SNUM) the QE can use + for the threads. Use fsl,qe-snums instead to not only specify the + number of snums, but also their values. + Example: qe@e0100000 { #address-cells = <1>; diff --git a/drivers/soc/fsl/qe/qe.c b/drivers/soc/fsl/qe/qe.c index aff9d1373529..af3c2b2b268f 100644 --- a/drivers/soc/fsl/qe/qe.c +++ b/drivers/soc/fsl/qe/qe.c @@ -283,7 +283,6 @@ EXPORT_SYMBOL(qe_clock_source); */ static void qe_snums_init(void) { - int i; static const u8 snum_init_76[] = { 0x04, 0x05, 0x0C, 0x0D, 0x14, 0x15, 0x1C, 0x1D, 0x24, 0x25, 0x2C, 0x2D, 0x34, 0x35, 0x88, 0x89, @@ -304,9 +303,22 @@ static void qe_snums_init(void) 0x28, 0x29, 0x38, 0x39, 0x48, 0x49, 0x58, 0x59, 0x68, 0x69, 0x78, 0x79, 0x80, 0x81, }; + struct device_node *qe; const u8 *snum_init; + int i; bitmap_zero(snum_state, QE_NUM_OF_SNUM); + qe = qe_get_device_node(); + if (qe) { + i = of_property_read_variable_u8_array(qe, "fsl,qe-snums", + snums, 1, QE_NUM_OF_SNUM); + of_node_put(qe); + if (i > 0) { + qe_num_of_snum = i; + return; + } + } + qe_num_of_snum = qe_get_num_of_snums(); if (qe_num_of_snum == 76)